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I'm building a smallish C project spread across multiple files. I'm trying to use GDB to debug, but it doesn't let me place breakpoints in source files outside the one containing main(). I can set breaks using the function name, but I want to set it at specific lines in other files. This is the Makefile I'm using:
test: test.c bootstrap.o object.o
gcc $(CFLAGS) -g -Wall -o test test.c bootstrap.o object.o -lpthread
bootstrap: object.h bootstrap.h bootstrap.c
gcc $(CFLAGS) -c -g -o bootstrap.o bootstrap.c
object: object.h object.c
gcc $(CFLAGS) -c -g -o object.o object.c -lpthread
clean: object.o
rm *.o
From what I've read online, using the -g flag should allow GDB to access all the source files, but it is not. I don't know if I'm supposed to pass a separate linker argument. Any help is appreciated.
PS. Are there any standard C debuggers out there besides GDB?
Last edited by Basu (2010-10-27 23:00:37)
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You have to state the filename. Like this:
(gdb) list object.c:1
...
5 void some_interesting_function()
6 {
7 int a = 0;
...
n }
...
(gdb) break object.c:7
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That's what I'm doing, but it tells me that there is no source file named object.c
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Well, gdb just does not find the source files the program was compiled from.
Are you starting gdb inside the build directory? Otherwise please have a look at: http://web.mit.edu/gnu/doc/html/gdb_9.html#SEC51
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I am starting GDB from inside the build directory. Doing a "show directories" shows $cdir:$cwd, but printing either of them gives void.
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The fault is in your Makefile, sorry that I did not see it before creating my first post:
bootstrap: object.h bootstrap.h bootstrap.c
should be:
bootstrap.o: object.h bootstrap.h bootstrap.c
Because there are no rules for test's dependencies bootstrap.o and object.o, they're created by a default command, which does not use the -g flag.
Your Makefile is too cumbersome. Instead of creating a single rule for every target/dependency, you should generalize them wherever it's possible:
CC?=gcc
CFLAGS+= -g -Wall
LDFLAGS=
LIBS=-lpthread
test: bootstrap.o object.o test.o
$(CC) $(LDFLAGS) -o $@ $^ $(LIBS)
%.o: %.c
$(CC) $(CFLAGS) -c -o $@ $^
clean:
rm *.o test
Why is there an object.o dependency for the target clean? Calling `make clean' without object.o would first create it and then delete it directly afterwards.
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Thanks a lot, that fixed it. This is the first time I'm writing Makefiles by hand. Previously I used Qmake to autogenerate Makefiles. I'm just getting started so I'm learning as I go.
The Bytebaker -- Computer science is not a science and it's not about computers
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