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#1 2020-09-10 15:29:36

Camandros
Member
Registered: 2020-09-10
Posts: 20

AMD dkms fails

Hi all,

When installing rocm-dkms from AUR, it includes rock-dkms-bin and rock-dkms-firmware-bin. Now my issue is that the depmod fails:

(2/2) Install DKMS modules
==> dkms install --no-depmod -m amdgpu-3.7 -v 20 -k 5.8.7-arch1-1
Error! Bad return status for module build on kernel: 5.8.7-arch1-1 (x86_64)
Consult /var/lib/dkms/amdgpu-3.7/20/build/make.log for more information.
==> Warning, `dkms install --no-depmod -m amdgpu-3.7 -v 20 -k 5.8.7-arch1-1' returned 10
==> depmod 5.8.7-arch1-1

The first error in /var/lib/dkms/amdgpu-3.7/20/build/make.log is:

/var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.c: In function 'ttm_bo_vm_fault_idle':
/var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.c:76:24: error: 'struct mm_struct' has no member named 'mmap_sem'; did you mean 'mmap_base'?
   76 |   up_read(&vma->vm_mm->mmap_sem);
      |                        ^~~~~~~~
      |                        mmap_base
/var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.c: In function 'amdttm_bo_vm_reserve':
/var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.c:155:26: error: 'struct mm_struct' has no member named 'mmap_sem'; did you mean 'mmap_base'?
  155 |     up_read(&vma->vm_mm->mmap_sem);
      |                          ^~~~~~~~
      |                          mmap_base
make[2]: *** [scripts/Makefile.build:281: /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.o] Error 1
make[2]: *** Waiting for unfinished jobs....
(...)
make[1]: *** [scripts/Makefile.build:497: /var/lib/dkms/amdgpu-3.7/20/build/ttm] Error 2
make[1]: *** Waiting for unfinished jobs....

and I have absolutely no clue on how to fix this.

What I also find weird is that running rocminfo says that the ROCk module is loaded:

   rocminfo 
ROCk module is loaded
Able to open /dev/kfd read-write
=====================    
HSA System Attributes    
=====================    
Runtime Version:         1.1
System Timestamp Freq.:  1000.000000MHz
Sig. Max Wait Duration:  18446744073709551615 (0xFFFFFFFFFFFFFFFF) (timestamp count)
Machine Model:           LARGE                              
System Endianness:       LITTLE                             

==========               
HSA Agents               
==========               
*******                  
Agent 1                  
*******                  
  Name:                    AMD Ryzen 5 3600X 6-Core Processor 
  Uuid:                    CPU-XX                             
  Marketing Name:          AMD Ryzen 5 3600X 6-Core Processor 
  Vendor Name:             CPU                                
  Feature:                 None specified                     
  Profile:                 FULL_PROFILE                       
  Float Round Mode:        NEAR                               
  Max Queue Number:        0(0x0)                             
  Queue Min Size:          0(0x0)                             
  Queue Max Size:          0(0x0)                             
  Queue Type:              MULTI                              
  Node:                    0                                  
  Device Type:             CPU                                
  Cache Info:              
    L1:                      32768(0x8000) KB                   
  Chip ID:                 0(0x0)                             
  Cacheline Size:          64(0x40)                           
  Max Clock Freq. (MHz):   3800                               
  BDFID:                   0                                  
  Internal Node ID:        0                                  
  Compute Unit:            12                                 
  SIMDs per CU:            0                                  
  Shader Engines:          0                                  
  Shader Arrs. per Eng.:   0                                  
  WatchPts on Addr. Ranges:1                                  
  Features:                None
  Pool Info:               
    Pool 1                   
      Segment:                 GLOBAL; FLAGS: KERNARG, FINE GRAINED
      Size:                    16403504(0xfa4c30) KB              
      Allocatable:             TRUE                               
      Alloc Granule:           4KB                                
      Alloc Alignment:         4KB                                
      Accessible by all:       TRUE                               
    Pool 2                   
      Segment:                 GLOBAL; FLAGS: COARSE GRAINED      
      Size:                    16403504(0xfa4c30) KB              
      Allocatable:             TRUE                               
      Alloc Granule:           4KB                                
      Alloc Alignment:         4KB                                
      Accessible by all:       TRUE                               
  ISA Info:                
    N/A                      
*******                  
Agent 2                  
*******                  
  Name:                    gfx1010                            
  Uuid:                    GPU-XX                             
  Marketing Name:          Navi 10 [Radeon RX 5600 OEM/5600 XT / 5700/5700 XT]
  Vendor Name:             AMD                                
  Feature:                 KERNEL_DISPATCH                    
  Profile:                 BASE_PROFILE                       
  Float Round Mode:        NEAR                               
  Max Queue Number:        128(0x80)                          
  Queue Min Size:          4096(0x1000)                       
  Queue Max Size:          131072(0x20000)                    
  Queue Type:              MULTI                              
  Node:                    1                                  
  Device Type:             GPU                                
  Cache Info:              
    L1:                      16(0x10) KB                        
  Chip ID:                 29471(0x731f)                      
  Cacheline Size:          64(0x40)                           
  Max Clock Freq. (MHz):   2070                               
  BDFID:                   2304                               
  Internal Node ID:        1                                  
  Compute Unit:            40                                 
  SIMDs per CU:            4                                  
  Shader Engines:          4                                  
  Shader Arrs. per Eng.:   2                                  
  WatchPts on Addr. Ranges:4                                  
  Features:                KERNEL_DISPATCH 
  Fast F16 Operation:      FALSE                              
  Wavefront Size:          32(0x20)                           
  Workgroup Max Size:      1024(0x400)                        
  Workgroup Max Size per Dimension:
    x                        1024(0x400)                        
    y                        1024(0x400)                        
    z                        1024(0x400)                        
  Max Waves Per CU:        80(0x50)                           
  Max Work-item Per CU:    2560(0xa00)                        
  Grid Max Size:           4294967295(0xffffffff)             
  Grid Max Size per Dimension:
    x                        4294967295(0xffffffff)             
    y                        4294967295(0xffffffff)             
    z                        4294967295(0xffffffff)             
  Max fbarriers/Workgrp:   32                                 
  Pool Info:               
    Pool 1                   
      Segment:                 GLOBAL; FLAGS: COARSE GRAINED      
      Size:                    8372224(0x7fc000) KB               
      Allocatable:             TRUE                               
      Alloc Granule:           4KB                                
      Alloc Alignment:         4KB                                
      Accessible by all:       FALSE                              
    Pool 2                   
      Segment:                 GROUP                              
      Size:                    64(0x40) KB                        
      Allocatable:             FALSE                              
      Alloc Granule:           0KB                                
      Alloc Alignment:         0KB                                
      Accessible by all:       FALSE                              
  ISA Info:                
    ISA 1                    
      Name:                    amdgcn-amd-amdhsa--gfx1010         
      Machine Models:          HSA_MACHINE_MODEL_LARGE            
      Profiles:                HSA_PROFILE_BASE                   
      Default Rounding Mode:   NEAR                               
      Default Rounding Mode:   NEAR                               
      Fast f16:                TRUE                               
      Workgroup Max Size:      1024(0x400)                        
      Workgroup Max Size per Dimension:
        x                        1024(0x400)                        
        y                        1024(0x400)                        
        z                        1024(0x400)                        
      Grid Max Size:           4294967295(0xffffffff)             
      Grid Max Size per Dimension:
        x                        4294967295(0xffffffff)             
        y                        4294967295(0xffffffff)             
        z                        4294967295(0xffffffff)             
      FBarrier Max Size:       32                                 
*** Done ***

Can someone please help me figure out how to properly install rock-dkms or if possible, the proper rocm stack?

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#2 2020-09-10 16:41:12

loqs
Member
Registered: 2014-03-06
Posts: 12,560

Re: AMD dkms fails

What package is providing the module that fails to build?

pacman -Qo /usr/src/amdgpu-3.7

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#3 2020-09-10 17:07:55

Camandros
Member
Registered: 2020-09-10
Posts: 20

Re: AMD dkms fails

Weird, I thought it would be rock-dkms-bin as it was by trying to install it that the issue emerged

   pacman -Qo /usr/src/amdgpu-3.7
error: No package owns /usr/src/amdgpu-3.7

What now? xD

Last edited by Camandros (2020-09-10 17:16:32)

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#4 2020-09-10 17:19:48

loqs
Member
Registered: 2014-03-06
Posts: 12,560

Re: AMD dkms fails

I would suggest removing /usr/src/amdgpu-3.7.  DKMS should then stop trying to build the amdgpu module.  The kernel package already provides it.

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#5 2020-09-10 17:34:50

Camandros
Member
Registered: 2020-09-10
Posts: 20

Re: AMD dkms fails

Ok, then what?

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#6 2020-09-10 17:36:21

Lone_Wolf
Member
From: Netherlands, Europe
Registered: 2005-10-04
Posts: 8,785

Re: AMD dkms fails

Rocm is tricky, have you checked the github link for rocm-arch they point to ?

The output of

$ pacman -Qs rock
$ pacman -Qs rocm

may be helpful .
(searching for roc gives to many things that have nothing to do with ROCm )


Disliking systemd intensely, but not satisfied with alternatives so focusing on taming systemd.
Automounting / udisks2 : unnnecessary, prefer mounting manually with pmount
Aur helpers : not needed
favourite command : # systemctl set-default multi-user.target

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#7 2020-09-10 17:44:10

Camandros
Member
Registered: 2020-09-10
Posts: 20

Re: AMD dkms fails

Searching for rock gives me this

local/rock-dkms-bin 3.7-1
    Linux AMD GPU kernel driver from ROC in DKMS format.
local/rock-dkms-firmware-bin 3.7-1
    Linux AMD GPU firmware from ROC in DKMS format.

which were installed by rocm-dkms.

Searching for rocm gives a lot of stuff I have installed from their stack, which makes sense.

Anyway, my question is still related to how to fix the error and properly install the amdgpu dkms.

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#8 2020-09-10 17:46:16

loqs
Member
Registered: 2014-03-06
Posts: 12,560

Re: AMD dkms fails

Does the following show the amdgpu module is available and loaded?

modinfo amdgpu
lsmod

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#9 2020-09-10 17:53:49

Lone_Wolf
Member
From: Netherlands, Europe
Registered: 2005-10-04
Posts: 8,785

Re: AMD dkms fails

loqs, I'm 99% sure OP is trying to build the kernel module specific to ROCm 3.7 , possibly to use OpenCL / cuda / tensorlfow etcetera.

Camandros, please post the full log file from the build fail, not just the lines with the first error.

Last edited by Lone_Wolf (2020-09-10 17:54:14)


Disliking systemd intensely, but not satisfied with alternatives so focusing on taming systemd.
Automounting / udisks2 : unnnecessary, prefer mounting manually with pmount
Aur helpers : not needed
favourite command : # systemctl set-default multi-user.target

Offline

#10 2020-09-10 17:56:04

loqs
Member
Registered: 2014-03-06
Posts: 12,560

Re: AMD dkms fails

Lone Wolf is that not provided by a package?  As pacman was not tracking the source directory in post #3.

Last edited by loqs (2020-09-10 17:59:36)

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#11 2020-09-10 18:00:18

Camandros
Member
Registered: 2020-09-10
Posts: 20

Re: AMD dkms fails

Lone_Wolf is indeed correct. I don't understand how that kernel module is available but not associated with a package. Is it possible to discover what packages provide the amdgpu kernel module?

   cat /var/lib/dkms/amdgpu-3.7/20/build/make.log 
DKMS make.log for amdgpu-3.7-20 for kernel 5.8.7-arch1-1 (x86_64)
Thu Sep 10 18:27:08 WEST 2020
make: Entering directory '/usr/lib/modules/5.8.7-arch1-1/build'
  AR      /var/lib/dkms/amdgpu-3.7/20/build/built-in.a
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/scheduler/sched_fence.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/scheduler/sched_main.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/scheduler/sched_entity.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_memory.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_tt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_util.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/main.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/symbols.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_module.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_drv.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_mn.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_memory.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_ioctl.o
/var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.c: In function 'ttm_bo_vm_fault_idle':
/var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.c:76:24: error: 'struct mm_struct' has no member named 'mmap_sem'; did you mean 'mmap_base'?
   76 |   up_read(&vma->vm_mm->mmap_sem);
      |                        ^~~~~~~~
      |                        mmap_base
/var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.c: In function 'amdttm_bo_vm_reserve':
/var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.c:155:26: error: 'struct mm_struct' has no member named 'mmap_sem'; did you mean 'mmap_base'?
  155 |     up_read(&vma->vm_mm->mmap_sem);
      |                          ^~~~~~~~
      |                          mmap_base
make[2]: *** [scripts/Makefile.build:281: /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.o] Error 1
make[2]: *** Waiting for unfinished jobs....
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_device.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_device_cgroup.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_drm_cache.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_drm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_fence_array.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_fence.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_io.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_kthread.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_kms.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_mm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_atombios.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/atombios_crtc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_pci.o
  LD [M]  /var/lib/dkms/amdgpu-3.7/20/build/scheduler/amd-sched.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_perf_event.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_fence.c:30:1: warning: 'dma_fence_test_signaled_any' defined but not used [-Wunused-function]
   30 | dma_fence_test_signaled_any(struct dma_fence **fences, uint32_t count,
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~~
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_reservation.o
make[1]: *** [scripts/Makefile.build:497: /var/lib/dkms/amdgpu-3.7/20/build/ttm] Error 2
make[1]: *** Waiting for unfinished jobs....
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_suspend.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_workqueue.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_seq_file.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_connector.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_backlight.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_pci.c: In function 'amdkcl_pci_init':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_pci.c:103:84: warning: passing argument 2 of 'amdkcl_fp_setup' discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
  103 |  _kcl_pcie_link_speed = (const unsigned char *) amdkcl_fp_setup("pcie_link_speed", _kcl_pcie_link_speed_stub);
      |                                                                                    ^~~~~~~~~~~~~~~~~~~~~~~~~
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_pci.c:4:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_common.h:12:63: note: expected 'void *' but argument is of type 'const unsigned char *'
   12 | static inline void *amdkcl_fp_setup(const char *symbol, void *fp_stup)
      |                                                         ~~~~~~^~~~~~~
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_drm_atomic_helper.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/dma-buf/dma-resv.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_reservation.c: In function 'amdkcl_reservation_init':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_reservation.c:59:10: warning: passing argument 2 of 'amdkcl_fp_setup' discards 'const' qualifier from pointer target type [-Wdiscarded-array-qualifiers]
   59 |          &_kcl_reservation_seqcount_string_stub);
      |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_reservation.c:33:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_common.h:12:63: note: expected 'void *' but argument is of type 'const char (*)[21]'
   12 | static inline void *amdkcl_fp_setup(const char *symbol, void *fp_stup)
      |                                                         ~~~~~~^~~~~~~
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/atom.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_fence.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ttm.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_kms.c: In function 'amdgpu_driver_load_kms':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_kms.c:210:38: error: 'DPM_FLAG_NEVER_SKIP' undeclared (first use in this function)
  210 |    dev_pm_set_driver_flags(dev->dev, DPM_FLAG_NEVER_SKIP);
      |                                      ^~~~~~~~~~~~~~~~~~~
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_kms.c:210:38: note: each undeclared identifier is reported only once for each function it appears in
make[2]: *** [scripts/Makefile.build:281: /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_kms.o] Error 1
make[2]: *** Waiting for unfinished jobs....
  LD [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/amdkcl.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function 'amdgpu_connector_update_scratch_regs':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:235:6: warning: unused variable 'i' [-Wunused-variable]
  235 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function 'amdgpu_connector_find_encoder':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:258:6: warning: unused variable 'i' [-Wunused-variable]
  258 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function 'amdgpu_connector_best_single_encoder':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:373:6: warning: unused variable 'i' [-Wunused-variable]
  373 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function 'amdgpu_connector_dvi_detect':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:1121:7: warning: unused variable 'i' [-Wunused-variable]
 1121 |   int i;
      |       ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function 'amdgpu_connector_dvi_encoder':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:1177:6: warning: unused variable 'i' [-Wunused-variable]
 1177 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function 'amdgpu_connector_encoder_get_dp_bridge_encoder_id':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:1341:6: warning: unused variable 'i' [-Wunused-variable]
 1341 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function 'amdgpu_connector_encoder_is_hbr2':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:1366:6: warning: unused variable 'i' [-Wunused-variable]
 1366 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ttm.c: In function 'amdgpu_ttm_tt_get_user_pages':
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ttm.c:933:17: error: 'struct mm_struct' has no member named 'mmap_sem'; did you mean 'mmap_base'?
  933 |  down_read(&mm->mmap_sem);
      |                 ^~~~~~~~
      |                 mmap_base
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ttm.c:945:17: error: 'struct mm_struct' has no member named 'mmap_sem'; did you mean 'mmap_base'?
  945 |    up_read(&mm->mmap_sem);
      |                 ^~~~~~~~
      |                 mmap_base
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ttm.c:976:15: error: 'struct mm_struct' has no member named 'mmap_sem'; did you mean 'mmap_base'?
  976 |  up_read(&mm->mmap_sem);
      |               ^~~~~~~~
      |               mmap_base
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ttm.c:981:15: error: 'struct mm_struct' has no member named 'mmap_sem'; did you mean 'mmap_base'?
  981 |  up_read(&mm->mmap_sem);
      |               ^~~~~~~~
      |               mmap_base
make[2]: *** [scripts/Makefile.build:280: /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ttm.o] Error 1
make[1]: *** [scripts/Makefile.build:497: /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu] Error 2
make: *** [Makefile:1756: /var/lib/dkms/amdgpu-3.7/20/build] Error 2
make: Leaving directory '/usr/lib/modules/5.8.7-arch1-1/build'

Offline

#12 2020-09-10 18:01:34

Lone_Wolf
Member
From: Netherlands, Europe
Registered: 2005-10-04
Posts: 8,785

Re: AMD dkms fails

https://github.com/rocm-arch/rocm-arch/ … n/PKGBUILD

Looks like it should come from the rock-dkms-bin package.
Camandros, please also post the output of

$ pacman -Ql rock-dkms-bin

If outputs are long , use a pastebin client


Disliking systemd intensely, but not satisfied with alternatives so focusing on taming systemd.
Automounting / udisks2 : unnnecessary, prefer mounting manually with pmount
Aur helpers : not needed
favourite command : # systemctl set-default multi-user.target

Offline

#13 2020-09-10 18:02:06

loqs
Member
Registered: 2014-03-06
Posts: 12,560

Re: AMD dkms fails

Perhaps a more general query will work:

pacman -Qo /usr/src
ls /usr/src

Edit:
My mistake the directory is /usr/src/amdgpu-3.7-20 provided by rock-dkms-bin

Last edited by loqs (2020-09-10 18:06:02)

Offline

#14 2020-09-10 18:04:20

Camandros
Member
Registered: 2020-09-10
Posts: 20

Re: AMD dkms fails

   pacman -Ql rock-dkms-bin
error: package 'rock-dkms-bin' was not found

   pacman -Qo /usr/src
/usr/src/ is owned by filesystem 2020.08.21-1
/usr/src/ is owned by linux-headers 5.8.7.arch1-1

   ls /usr/src
linux

Offline

#15 2020-09-10 18:08:26

Camandros
Member
Registered: 2020-09-10
Posts: 20

Re: AMD dkms fails

I removed /usr/src/amdgpu-3.7-20 per your suggestion.

Offline

#16 2020-09-10 18:11:25

Camandros
Member
Registered: 2020-09-10
Posts: 20

Re: AMD dkms fails

Is it possible that xf86-video-amdgpu is causing some conflict?

Offline

#17 2020-09-10 18:16:39

Lone_Wolf
Member
From: Netherlands, Europe
Registered: 2005-10-04
Posts: 8,785

Re: AMD dkms fails

Unlikely.

For now remove rocm-dkms , then re-install rock-dkms-bin

If that succeeds, reboot (just in case) and try re-installing rocm-dkms again.


Disliking systemd intensely, but not satisfied with alternatives so focusing on taming systemd.
Automounting / udisks2 : unnnecessary, prefer mounting manually with pmount
Aur helpers : not needed
favourite command : # systemctl set-default multi-user.target

Offline

#18 2020-09-10 18:29:31

loqs
Member
Registered: 2014-03-06
Posts: 12,560

Re: AMD dkms fails

Lone_wolf can reproduce the issue?  I have a different failure here.
Edit:
After fixing an issue in amd/amdkcl/kcl_common.h

DKMS make.log for amdgpu-3.7-20 for kernel 5.8.7-arch1-1 (x86_64)
Thu Sep 10 07:09:52 PM UTC 2020
make: Entering directory '/usr/lib/modules/5.8.7-arch1-1/build'
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/scheduler/sched_main.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/scheduler/sched_fence.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/scheduler/sched_entity.o
  AR      /var/lib/dkms/amdgpu-3.7/20/build/built-in.a
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_memory.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_tt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/main.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/symbols.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_drv.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_mn.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_memory.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_ioctl.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_device_cgroup.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_util.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_vm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_drm_cache.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_drm.o
  LD [M]  /var/lib/dkms/amdgpu-3.7/20/build/scheduler/amd-sched.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_device.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_fence_array.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_fence.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_module.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_io.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_kthread.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_mm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_execbuf_util.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_fence.c:30:1: warning: ‘dma_fence_test_signaled_any’ defined but not used [-Wunused-function]
   30 | dma_fence_test_signaled_any(struct dma_fence **fences, uint32_t count,
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~~
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_page_alloc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_pci.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_perf_event.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_reservation.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_bo_manager.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_suspend.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_pci.c: In function ‘amdkcl_pci_init’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_pci.c:103:84: warning: passing argument 2 of ‘amdkcl_fp_setup’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
  103 |  _kcl_pcie_link_speed = (const unsigned char *) amdkcl_fp_setup("pcie_link_speed", _kcl_pcie_link_speed_stub);
      |                                                                                    ^~~~~~~~~~~~~~~~~~~~~~~~~
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_pci.c:4:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_common.h:26:63: note: expected ‘void *’ but argument is of type ‘const unsigned char *’
   26 | static inline void *amdkcl_fp_setup(const char *symbol, void *fp_stup)
      |                                                         ~~~~~~^~~~~~~
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_reservation.c: In function ‘amdkcl_reservation_init’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_reservation.c:59:10: warning: passing argument 2 of ‘amdkcl_fp_setup’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-array-qualifiers]
   59 |          &_kcl_reservation_seqcount_string_stub);
      |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_reservation.c:33:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_common.h:26:63: note: expected ‘void *’ but argument is of type ‘const char (*)[21]’
   26 | static inline void *amdkcl_fp_setup(const char *symbol, void *fp_stup)
      |                                                         ~~~~~~^~~~~~~
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_workqueue.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_seq_file.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_page_alloc_dma.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_connector.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_backlight.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/kcl_drm_atomic_helper.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/ttm_agp_backend.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/dma-buf/dma-resv.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_kms.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_atombios.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/atombios_crtc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/atom.o
  LD [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/amdkcl.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_fence.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ttm.o
  LD [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/amdttm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_object.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function ‘amdgpu_connector_update_scratch_regs’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:235:6: warning: unused variable ‘i’ [-Wunused-variable]
  235 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function ‘amdgpu_connector_find_encoder’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:258:6: warning: unused variable ‘i’ [-Wunused-variable]
  258 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function ‘amdgpu_connector_best_single_encoder’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:373:6: warning: unused variable ‘i’ [-Wunused-variable]
  373 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function ‘amdgpu_connector_dvi_detect’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:1121:7: warning: unused variable ‘i’ [-Wunused-variable]
 1121 |   int i;
      |       ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function ‘amdgpu_connector_dvi_encoder’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:1177:6: warning: unused variable ‘i’ [-Wunused-variable]
 1177 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function ‘amdgpu_connector_encoder_get_dp_bridge_encoder_id’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:1341:6: warning: unused variable ‘i’ [-Wunused-variable]
 1341 |  int i;
      |      ^
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c: In function ‘amdgpu_connector_encoder_is_hbr2’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_connectors.c:1366:6: warning: unused variable ‘i’ [-Wunused-variable]
 1366 |  int i;
      |      ^
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_gart.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_encoders.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_display.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_i2c.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_fb.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_gem.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ring.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_cs.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_bios.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_benchmark.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_test.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_pm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/atombios_dp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_afmt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_trace_points.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/atombios_encoders.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_sa.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/atombios_i2c.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_dma_buf.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_vm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ib.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_pll.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ucode.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_bo_list.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ctx.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_sync.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_gtt_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_vram_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_virt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_atomfirmware.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_vf_error.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_sched.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_debugfs.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ids.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_gmc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_mmhub.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_xgmi.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_csa.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ras.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_vm_cpu.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_vm_sdma.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_discovery.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ras_eeprom.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_nbio.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_umc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/smu_v11_0_i2c.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_sem.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_fru_eeprom.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_pmu.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/cik.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/cik_ih.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/kv_smc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/kv_dpm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/dce_v8_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gfx_v7_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/cik_sdma.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/uvd_v4_2.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vce_v2_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/si.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gmc_v6_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gfx_v6_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/si_ih.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/si_dma.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/dce_v6_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/si_dpm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/si_smc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/uvd_v3_1.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vi.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/mxgpu_vi.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/nbio_v6_1.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/soc15.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/emu_soc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/mxgpu_ai.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/nbio_v7_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vega10_reg_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vega20_reg_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/nbio_v7_4.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/nbio_v2_3.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/nv.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/navi10_reg_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/navi14_reg_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/arct_reg_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/navi12_reg_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/mxgpu_nv.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/sienna_cichlid_reg_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/df_v1_7.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/df_v3_6.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gmc_v7_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gmc_v8_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gfxhub_v1_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/mmhub_v1_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gmc_v9_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gfxhub_v1_1.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/mmhub_v9_4.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gfxhub_v2_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/mmhub_v2_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gmc_v10_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gfxhub_v2_1.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/umc_v6_1.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/umc_v6_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_irq.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ih.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/iceland_ih.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/tonga_ih.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/cz_ih.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vega10_ih.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/navi10_ih.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_psp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/psp_v3_1.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/psp_v10_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/psp_v11_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/psp_v12_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_dpm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/dce_v10_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/dce_v11_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/dce_virtual.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_gfx.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_rlc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gfx_v8_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gfx_v9_0.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/dce_virtual.c: In function ‘dce_virtual_encoder’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/dce_virtual.c:299:6: warning: unused variable ‘i’ [-Wunused-variable]
  299 |  int i;
      |      ^
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gfx_v9_4.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/gfx_v10_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_sdma.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/sdma_v2_4.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/sdma_v3_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/sdma_v4_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/sdma_v5_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/sdma_v5_2.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/mes_v10_1.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_uvd.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/uvd_v5_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/uvd_v6_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/uvd_v7_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_vce.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vce_v3_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vce_v4_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_vcn.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vcn_v1_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vcn_v2_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vcn_v2_5.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/vcn_v3_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_jpeg.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/jpeg_v1_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/jpeg_v2_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/jpeg_v2_5.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/jpeg_v3_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/athub_v1_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/athub_v2_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/athub_v2_1.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_amdkfd.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_module.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_device.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_chardev.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_topology.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_pasid.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_doorbell.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_flat_memory.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_process.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_queue.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_mqd_manager.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_mqd_manager_cik.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_mqd_manager_vi.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_mqd_manager_v9.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_mqd_manager_v10.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_kernel_queue.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_packet_manager.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_packet_manager_vi.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_packet_manager_v9.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_process_queue_manager.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_device_queue_manager.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_device_queue_manager_cik.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_device_queue_manager_vi.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v9.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v10.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_interrupt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_events.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/cik_event_interrupt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_int_process_v9.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_dbgdev.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_dbgmgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_smi_events.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_crat.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_rdma.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_peerdirect.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_ipc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_trace.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_debug_events.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_iommu.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../amdkfd/kfd_debugfs.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_amdkfd_fence.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_amdkfd_gpuvm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_amdkfd_gfx_v8.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_amdkfd_gfx_v9.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_amdkfd_arcturus.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_amdkfd_gfx_v10.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_amdkfd_gfx_v7.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_cgs.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_job.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_acp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../acp/acp_hw.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_ioc32.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_atpx_handler.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_acpi.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu_mn.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/smu8_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/tonga_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/fiji_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/polaris10_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/iceland_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/smu7_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/vega10_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/smu10_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/ci_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/vega12_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/vegam_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/smu9_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smumgr/vega20_smumgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/hwmgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/processpptables.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/hardwaremanager.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/smu8_hwmgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/pppcielanes.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/process_pptables_v1_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/ppatomctrl.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/ppatomfwctrl.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/smu7_powertune.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/smu7_thermal.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/smu7_clockpowergating.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega10_processpptables.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega10_hwmgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega10_powertune.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega10_thermal.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/smu10_hwmgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/pp_psm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega12_processpptables.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega12_hwmgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega12_thermal.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/pp_overdriver.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/smu_helper.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega20_processpptables.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega20_hwmgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega20_powertune.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega20_thermal.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/common_baco.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega10_baco.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega20_baco.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/vega12_baco.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/smu9_baco.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/tonga_baco.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/polaris_baco.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/fiji_baco.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/ci_baco.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/hwmgr/smu7_baco.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/amd_powerplay.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/amdgpu_smu.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smu_v11_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/smu_v12_0.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/arcturus_ppt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/navi10_ppt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/renoir_ppt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../powerplay/sienna_cichlid_ppt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_irq.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_color.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_services.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.c: In function ‘validate_dsc_caps_on_connector’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.c:188:18: warning: unused variable ‘dc_sink’ [-Wunused-variable]
  188 |  struct dc_sink *dc_sink = aconnector->dc_sink;
      |                  ^~~~~~~
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.c: In function ‘dm_dp_destroy_mst_connector’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.c:495:24: warning: unused variable ‘adev’ [-Wunused-variable]
  495 |  struct amdgpu_device *adev = dev->dev_private;
      |                        ^~~~
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function ‘amdgpu_dm_atomic_check’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:9511:25: warning: unused variable ‘dm_old_crtc_state’ [-Wunused-variable]
 9511 |   struct dm_crtc_state *dm_old_crtc_state  = to_dm_crtc_state(old_crtc_state);
      |                         ^~~~~~~~~~~~~~~~~
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:9510:25: warning: unused variable ‘dm_new_crtc_state’ [-Wunused-variable]
 9510 |   struct dm_crtc_state *dm_new_crtc_state = to_dm_crtc_state(new_crtc_state);
      |                         ^~~~~~~~~~~~~~~~~
At top level:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.c:489:13: warning: ‘dm_dp_destroy_mst_connector’ defined but not used [-Wunused-function]
  489 | static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.c:186:13: warning: ‘validate_dsc_caps_on_connector’ defined but not used [-Wunused-function]
  186 | static bool validate_dsc_caps_on_connector(struct amdgpu_dm_connector *aconnector)
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
At top level:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:3495:11: warning: ‘dm_get_backlight_level’ defined but not used [-Wunused-function]
 3495 | static u8 dm_get_backlight_level(struct amdgpu_encoder *amdgpu_encoder)
      |           ^~~~~~~~~~~~~~~~~~~~~~
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:3489:13: warning: ‘dm_set_backlight_level’ defined but not used [-Wunused-function]
 3489 | static void dm_set_backlight_level(struct amdgpu_encoder *amdgpu_encoder,
      |             ^~~~~~~~~~~~~~~~~~~~~~
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_hdcp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_crc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/basics/conversion.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/basics/fixpt31_32.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/basics/vector.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/basics/dc_common.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/bios_parser.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/bios_parser_interface.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/bios_parser_helper.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/command_table.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/command_table_helper.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/bios_parser_common.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/command_table2.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/command_table_helper2.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/bios_parser2.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/dce80/command_table_helper_dce80.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/dce110/command_table_helper_dce110.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/dce112/command_table_helper_dce112.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/bios/dce112/command_table_helper2_dce112.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/calcs/dce_calcs.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/calcs/bw_fixed.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/calcs/custom_float.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/calcs/dcn_calcs.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/calcs/dcn_calc_math.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/calcs/dcn_calc_auto.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/clk_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dce100/dce_clk_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dce110/dce110_clk_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dce112/dce112_clk_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dce120/dce120_clk_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv1_clk_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv2_clk_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_audio.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_stream_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_link_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_hwseq.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_mem_input.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_clock_source.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_scl_filters.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_transform.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_opp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_dmcu.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_abm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_ipp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_aux.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_i2c.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_i2c_hw.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_i2c_sw.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dmub_psr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dmub_abm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dce_panel_cntl.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce/dmub_hw_lock_mgr.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/gpio_base.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/gpio_service.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/hw_factory.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/hw_gpio.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/hw_hpd.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/hw_ddc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/hw_generic.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/hw_translate.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dce80/hw_translate_dce80.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dce80/hw_factory_dce80.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dce110/hw_translate_dce110.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dce110/hw_factory_dce110.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dce120/hw_translate_dce120.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dce120/hw_factory_dce120.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dcn10/hw_translate_dcn10.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dcn10/hw_factory_dcn10.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dcn20/hw_translate_dcn20.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dcn20/hw_factory_dcn20.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dcn21/hw_translate_dcn21.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dcn21/hw_factory_dcn21.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dcn30/hw_translate_dcn30.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/dcn30/hw_factory_dcn30.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/diagnostics/hw_translate_diag.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/gpio/diagnostics/hw_factory_diag.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/irq/irq_service.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/irq/dce80/irq_service_dce80.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/irq/dce110/irq_service_dce110.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/irq/dce120/irq_service_dce120.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/irq/dcn10/irq_service_dcn10.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/irq/dcn20/irq_service_dcn20.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/irq/dcn30/irq_service_dcn30.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/virtual/virtual_link_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/virtual/virtual_stream_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_resource.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_dpp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_hubp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_opp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_hubbub.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_optc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_mmhubbub.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_stream_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_link_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_dccg.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_vmid.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_dwb.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn20/dcn20_dwb_scl.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_resource.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_ipp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer_debug.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_dpp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_opp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_optc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_hubp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_mpc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_dpp_dscl.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_dpp_cm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_cm_common.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_hubbub.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_stream_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn10/dcn10_link_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/display_mode_lib.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/display_rq_dlg_helpers.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/dml1_display_rq_dlg_calc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/display_mode_vba.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/dcn20/display_rq_dlg_calc_20.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/dcn20/display_rq_dlg_calc_20v2.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20v2.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/dcn21/display_rq_dlg_calc_21.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/dcn21/display_mode_vba_21.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn21/dcn21_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn21/dcn21_hubp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn21/dcn21_hubbub.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn21/dcn21_resource.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn21/dcn21_hwseq.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn21/dcn21_link_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_init.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_hubbub.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_hubp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_optc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_dccg.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_hwseq.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_vpg.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_afmt.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_dio_stream_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_dwb.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_dpp_cm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_dwb_cm.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_cm_common.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_mmhubbub.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_dio_link_encoder.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dcn30/dcn30_resource.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce120/dce120_resource.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce120/dce120_timing_generator.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce120/dce120_hw_sequencer.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce112/dce112_compressor.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce112/dce112_hw_sequencer.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce112/dce112_resource.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce110/dce110_timing_generator.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce110/dce110_compressor.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce110/dce110_resource.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce110/dce110_opp_regamma_v.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce110/dce110_opp_csc_v.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce110/dce110_timing_generator_v.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce110/dce110_mem_input_v.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce110/dce110_opp_v.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce110/dce110_transform_v.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce100/dce100_resource.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce100/dce100_hw_sequencer.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce80/dce80_timing_generator.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce80/dce80_hw_sequencer.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dce80/dce80_resource.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/hdcp/hdcp_msg.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_link.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_resource.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_hw_sequencer.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_sink.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_surface.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc.c: In function ‘copy_stream_update_to_stream’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc.c:2115:21: warning: unused variable ‘dc_ctx’ [-Wunused-variable]
 2115 |  struct dc_context *dc_ctx = dc->ctx;
      |                     ^~~~~~
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_link_hwss.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_link_dp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_link_ddc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_debug.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_stream.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_vm_helper.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dc_helper.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/dc_dmub_srv.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/freesync/freesync.o
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_debug.c: In function ‘dc_status_to_str’:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_debug.c:378:2: warning: enumeration value ‘DC_FAIL_DSC_VALIDATE’ not handled in switch [-Wswitch]
  378 |  switch (status) {
      |  ^~~~~~
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dc/core/dc_debug.c:378:2: warning: enumeration value ‘DC_NO_DSC_RESOURCE’ not handled in switch [-Wswitch]
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/color/color_gamma.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/color/color_table.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/info_packet/info_packet.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/power/power_helpers.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_srv.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_dcn20.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_dcn21.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_dcn30.o
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.c:26:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.h:61: warning: "REG_SET" redefined
   61 | #define REG_SET(reg_name, initial_val, field, val) \
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/include/kcl/kcl_amdgpu.h:6,
                 from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/backport.h:18,
                 from <command-line>:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.h:1097: note: this is the location of the previous definition
 1097 | #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.c:26:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.h:112: warning: "REG_GET" redefined
  112 | #define REG_GET(reg_name, field, val) \
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/include/kcl/kcl_amdgpu.h:6,
                 from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/backport.h:18,
                 from <command-line>:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.h:1098: note: this is the location of the previous definition
 1098 | #define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
      | 
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/hdcp/hdcp_ddc.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/hdcp/hdcp_log.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/hdcp/hdcp_psp.o
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_dcn20.c:27:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.h:61: warning: "REG_SET" redefined
   61 | #define REG_SET(reg_name, initial_val, field, val) \
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/include/kcl/kcl_amdgpu.h:6,
                 from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/backport.h:18,
                 from <command-line>:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.h:1097: note: this is the location of the previous definition
 1097 | #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_dcn20.c:27:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.h:112: warning: "REG_GET" redefined
  112 | #define REG_GET(reg_name, field, val) \
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/include/kcl/kcl_amdgpu.h:6,
                 from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/backport.h:18,
                 from <command-line>:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.h:1098: note: this is the location of the previous definition
 1098 | #define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
      | 
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/hdcp/hdcp.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/hdcp/hdcp1_execution.o
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_dcn21.c:27:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.h:61: warning: "REG_SET" redefined
   61 | #define REG_SET(reg_name, initial_val, field, val) \
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/include/kcl/kcl_amdgpu.h:6,
                 from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/backport.h:18,
                 from <command-line>:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.h:1097: note: this is the location of the previous definition
 1097 | #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_dcn21.c:27:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.h:112: warning: "REG_GET" redefined
  112 | #define REG_GET(reg_name, field, val) \
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/include/kcl/kcl_amdgpu.h:6,
                 from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/backport.h:18,
                 from <command-line>:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.h:1098: note: this is the location of the previous definition
 1098 | #define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_dcn30.c:27:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.h:61: warning: "REG_SET" redefined
   61 | #define REG_SET(reg_name, initial_val, field, val) \
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/include/kcl/kcl_amdgpu.h:6,
                 from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/backport.h:18,
                 from <command-line>:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.h:1097: note: this is the location of the previous definition
 1097 | #define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_dcn30.c:27:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/dmub/src/dmub_reg.h:112: warning: "REG_GET" redefined
  112 | #define REG_GET(reg_name, field, val) \
      | 
In file included from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/include/kcl/kcl_amdgpu.h:6,
                 from /var/lib/dkms/amdgpu-3.7/20/build/amd/backport/backport.h:18,
                 from <command-line>:
/var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.h:1098: note: this is the location of the previous definition
 1098 | #define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
      | 
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/hdcp/hdcp1_transition.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/hdcp/hdcp2_execution.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../display/modules/hdcp/hdcp2_transition.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../backport/kcl_mmu_notifier.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/../backport/kcl_drm_fb_helper.o
  LD [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.o
  MODPOST /var/lib/dkms/amdgpu-3.7/20/build/Module.symvers
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.mod.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/amdkcl.mod.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/scheduler/amd-sched.mod.o
  CC [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/amdttm.mod.o
  LD [M]  /var/lib/dkms/amdgpu-3.7/20/build/scheduler/amd-sched.ko
  LD [M]  /var/lib/dkms/amdgpu-3.7/20/build/ttm/amdttm.ko
  LD [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdkcl/amdkcl.ko
  LD [M]  /var/lib/dkms/amdgpu-3.7/20/build/amd/amdgpu/amdgpu.ko
make: Leaving directory '/usr/lib/modules/5.8.7-arch1-1/build'

Last edited by loqs (2020-09-10 19:39:05)

Offline

#19 2020-09-10 20:18:53

Lone_Wolf
Member
From: Netherlands, Europe
Registered: 2005-10-04
Posts: 8,785

Re: AMD dkms fails

Different failure then OP, https://pastebin.com/KJW3LtG5 .

Loqs, you're better at these things then I.
The unused messages look relative harmless, but is the REG_GET redefined warning something to worry about ?

@OP : this is beginning to look like an upstream error, possibly related to kernel changes.

Last edited by Lone_Wolf (2020-09-10 20:19:51)


Disliking systemd intensely, but not satisfied with alternatives so focusing on taming systemd.
Automounting / udisks2 : unnnecessary, prefer mounting manually with pmount
Aur helpers : not needed
favourite command : # systemctl set-default multi-user.target

Offline

#20 2020-09-10 20:29:19

Camandros
Member
Registered: 2020-09-10
Posts: 20

Re: AMD dkms fails

I already tried installing and reinstalling rocm-dmks to no avail. BTW there is no solo package rocm-dkms-bin.

yay -S rocm-dkms-bin
 -> Could not find all required packages:
        rocm-dkms-bin (Target)

What should I try now?

(thanks for the effor btw)

Offline

#21 2020-09-10 21:20:32

loqs
Member
Registered: 2014-03-06
Posts: 12,560

Re: AMD dkms fails

diff --git a/PKGBUILD b/PKGBUILD
index 9dc8379..4894ed7 100644
--- a/PKGBUILD
+++ b/PKGBUILD
@@ -26,5 +26,7 @@ package() {
   patch --forward -p4 -t --input=${srcdir}/rock_compatibility.patch > patching.log \
      || echo "patch is meant to fail as not all files from the kernel is in the binary"
 
+   sed -i 's/addr = kallsyms_lookup_name(symbol);/addr = kcl_kallsyms_lookup_name(symbol);/' amd/amdkcl/kcl_common.h
+
   install -Dm644 "$pkgdir/usr/share/doc/rock-dkms/copyright" "$pkgdir/usr/share/licenses/$pkgname/LICENSE"
 }

I patched the issue I was experiencing which was the same as Lone_Wolf produced with the above.

The patch the PKGBUILD applies is confusing to me.

Subject: [PATCH 15/40] amd/amdkcl: avoid kallsyms_lookup_name for 5.7+
Subject: [PATCH 16/40] amd/amdkcl: replace kallsyms_lookup_name for 5.7.0+
Subject: [PATCH 27/40] amd/amdkcl: avoid kallsyms_lookup_name for 5.7+
Subject: [PATCH 28/40] amd/amdkcl: replace kallsyms_lookup_name for 5.7.0+

Patch's 16 and 28 are identical except the commits they apply to?
Applying 15

patching file amd/amdkcl/kcl_common.h
Hunk #1 FAILED at 8.
Hunk #2 succeeded at 18 (offset -11 lines).
1 out of 2 hunks FAILED -- saving rejects to file amd/amdkcl/kcl_common.h.rej
patching file amd/amdkcl/symbols
Hunk #1 FAILED at 1.
1 out of 1 hunk FAILED -- saving rejects to file amd/amdkcl/symbols.rej

Applying 16

patching file amd/amdkcl/kcl_common.h
Hunk #1 FAILED at 8.
1 out of 1 hunk FAILED -- saving rejects to file amd/amdkcl/kcl_common.h.rej
patching file amd/amdkcl/symbols
Hunk #1 FAILED at 1.
1 out of 1 hunk FAILED -- saving rejects to file amd/amdkcl/symbols.rej

Applying 27

patching file amd/amdkcl/kcl_common.h
Hunk #2 FAILED at 32.
Hunk #3 succeeded at 51 (offset 4 lines).
1 out of 3 hunks FAILED -- saving rejects to file amd/amdkcl/kcl_common.h.rej
patching file amd/amdkcl/symbols

Applying 28

patching file amd/amdkcl/kcl_common.h
patching file amd/amdkcl/symbols

None of the patches changes:

static inline void *amdkcl_fp_setup(const char *symbol, void *fp_stup)

To stop it using kallsyms_lookup_name.
Edit:
Camandros what is the pkgver of rocm-dkms-bin you have installed now?
Edit2:
The patches that apply are *14 21 23 24 25 **26 27 28 29 30 31 32 33 34 35 36 37 38 39 40.
* and ** are duplicates.
Edit3:
Updated rock_compatibility.patch apply with patch -p1.

From c30dc23fa34a55e9b7f2b223b98f98b809dda7bc Mon Sep 17 00:00:00 2001
From: Felix Kuehling <Felix.Kuehling@amd.com>
Date: Fri, 1 May 2020 10:40:05 -0400
Subject: [PATCH 01/18] drm/amdkfd: Fix a race condition getting IPC obj handle
 reference

If an IPC object is being released (zero refcount) don't try to take another
reference to it.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Tested-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
---
 amd/amdkfd/kfd_ipc.c | 46 ++++++++++++++++++++++----------------------
 amd/amdkfd/kfd_ipc.h |  5 ++---
 2 files changed, 25 insertions(+), 26 deletions(-)

diff --git a/amd/amdkfd/kfd_ipc.c b/amd/amdkfd/kfd_ipc.c
index d52e0f3..fe015e5 100644
--- a/amd/amdkfd/kfd_ipc.c
+++ b/amd/amdkfd/kfd_ipc.c
@@ -61,7 +61,8 @@ int kfd_ipc_store_insert(struct dma_buf *dmabuf, struct kfd_ipc_obj **ipc_obj)
 	get_random_bytes(obj->share_handle, sizeof(obj->share_handle));
 
 	mutex_lock(&kfd_ipc_handles.lock);
-	hlist_add_head(&obj->node,
+	hlist_add_head(
+		&obj->node,
 		&kfd_ipc_handles.handles[HANDLE_TO_KEY(obj->share_handle)]);
 	mutex_unlock(&kfd_ipc_handles.lock);
 
@@ -107,12 +108,11 @@ int kfd_ipc_init(void)
 	return 0;
 }
 
-static int kfd_import_dmabuf_create_kfd_bo(struct kfd_dev *dev,
-			  struct kfd_process *p,
-			  uint32_t gpu_id,
-			  struct dma_buf *dmabuf, struct kfd_ipc_obj *ipc_obj,
-			  uint64_t va_addr, uint64_t *handle,
-			  uint64_t *mmap_offset)
+static int
+kfd_import_dmabuf_create_kfd_bo(struct kfd_dev *dev, struct kfd_process *p,
+				uint32_t gpu_id, struct dma_buf *dmabuf,
+				struct kfd_ipc_obj *ipc_obj, uint64_t va_addr,
+				uint64_t *handle, uint64_t *mmap_offset)
 {
 	int r;
 	void *mem;
@@ -135,14 +135,14 @@ static int kfd_import_dmabuf_create_kfd_bo(struct kfd_dev *dev,
 	}
 
 	r = amdgpu_amdkfd_gpuvm_import_dmabuf(dev->kgd, dmabuf, ipc_obj,
-					va_addr, pdd->vm,
-					(struct kgd_mem **)&mem, &size,
-					mmap_offset);
+					      va_addr, pdd->vm,
+					      (struct kgd_mem **)&mem, &size,
+					      mmap_offset);
 	if (r)
 		goto err_unlock;
 
-	idr_handle = kfd_process_device_create_obj_handle(pdd, mem,
-							  va_addr, size, 0, 0);
+	idr_handle = kfd_process_device_create_obj_handle(pdd, mem, va_addr,
+							  size, 0, 0);
 	if (idr_handle < 0) {
 		r = -EFAULT;
 		goto err_free;
@@ -155,17 +155,16 @@ static int kfd_import_dmabuf_create_kfd_bo(struct kfd_dev *dev,
 	return 0;
 
 err_free:
-	amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->kgd, (struct kgd_mem *)mem, NULL);
+	amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->kgd, (struct kgd_mem *)mem,
+					       NULL);
 err_unlock:
 	mutex_unlock(&p->mutex);
 	return r;
 }
 
-int kfd_ipc_import_dmabuf(struct kfd_dev *dev,
-					   struct kfd_process *p,
-					   uint32_t gpu_id, int dmabuf_fd,
-					   uint64_t va_addr, uint64_t *handle,
-					   uint64_t *mmap_offset)
+int kfd_ipc_import_dmabuf(struct kfd_dev *dev, struct kfd_process *p,
+			  uint32_t gpu_id, int dmabuf_fd, uint64_t va_addr,
+			  uint64_t *handle, uint64_t *mmap_offset)
 {
 	int r;
 	struct dma_buf *dmabuf = dma_buf_get(dmabuf_fd);
@@ -191,8 +190,9 @@ int kfd_ipc_import_handle(struct kfd_dev *dev, struct kfd_process *p,
 	/* Convert the user provided handle to hash key and search only in that
 	 * bucket
 	 */
-	hlist_for_each_entry(entry,
-		&kfd_ipc_handles.handles[HANDLE_TO_KEY(share_handle)], node) {
+	hlist_for_each_entry (
+		entry, &kfd_ipc_handles.handles[HANDLE_TO_KEY(share_handle)],
+		node) {
 		if (!memcmp(entry->share_handle, share_handle,
 			    sizeof(entry->share_handle))) {
 			found = ipc_obj_get(entry);
@@ -206,9 +206,9 @@ int kfd_ipc_import_handle(struct kfd_dev *dev, struct kfd_process *p,
 
 	pr_debug("Found ipc_dma_buf: %p\n", found->dmabuf);
 
-	r = kfd_import_dmabuf_create_kfd_bo(dev, p, gpu_id,
-					    found->dmabuf, found,
-					    va_addr, handle, mmap_offset);
+	r = kfd_import_dmabuf_create_kfd_bo(dev, p, gpu_id, found->dmabuf,
+					    found, va_addr, handle,
+					    mmap_offset);
 	if (r)
 		goto error_unref;
 
diff --git a/amd/amdkfd/kfd_ipc.h b/amd/amdkfd/kfd_ipc.h
index 72fe8e4..62a01d4 100644
--- a/amd/amdkfd/kfd_ipc.h
+++ b/amd/amdkfd/kfd_ipc.h
@@ -43,9 +43,8 @@ int kfd_ipc_import_handle(struct kfd_dev *dev, struct kfd_process *p,
 			  uint64_t va_addr, uint64_t *handle,
 			  uint64_t *mmap_offset);
 int kfd_ipc_import_dmabuf(struct kfd_dev *kfd, struct kfd_process *p,
-			  uint32_t gpu_id, int dmabuf_fd,
-			  uint64_t va_addr, uint64_t *handle,
-			  uint64_t *mmap_offset);
+			  uint32_t gpu_id, int dmabuf_fd, uint64_t va_addr,
+			  uint64_t *handle, uint64_t *mmap_offset);
 int kfd_ipc_export_as_handle(struct kfd_dev *dev, struct kfd_process *p,
 			     uint64_t handle, uint32_t *ipc_handle);
 
-- 
2.28.0


From fa01ef4d4b32ca27ca0615e9db96466f34826c67 Mon Sep 17 00:00:00 2001
From: Flora Cui <flora.cui@amd.com>
Date: Wed, 29 Apr 2020 20:49:26 +0800
Subject: [PATCH 02/18] drm/amdkcl: fix intree failure due to vmf->vma kcl
 wrapper

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
---
 ttm/ttm_bo_vm.c | 67 ++++++++++++++++++++++++-------------------------
 1 file changed, 33 insertions(+), 34 deletions(-)

diff --git a/ttm/ttm_bo_vm.c b/ttm/ttm_bo_vm.c
index 675ab57..739ade2 100644
--- a/ttm/ttm_bo_vm.c
+++ b/ttm/ttm_bo_vm.c
@@ -48,8 +48,8 @@
 #endif
 
 static vm_fault_t ttm_bo_vm_fault_idle(struct ttm_buffer_object *bo,
-				struct vm_fault *vmf,
-				struct vm_area_struct *vma)
+				       struct vm_fault *vmf,
+				       struct vm_area_struct *vma)
 {
 	vm_fault_t ret = 0;
 	int err = 0;
@@ -74,7 +74,7 @@ static vm_fault_t ttm_bo_vm_fault_idle(struct ttm_buffer_object *bo,
 
 		ttm_bo_get(bo);
 		up_read(&vma->vm_mm->mmap_sem);
-		(void) dma_fence_wait(bo->moving, true);
+		(void)dma_fence_wait(bo->moving, true);
 		dma_resv_unlock(amdkcl_ttm_resvp(bo));
 		ttm_bo_put(bo);
 		goto out_unlock;
@@ -85,8 +85,7 @@ static vm_fault_t ttm_bo_vm_fault_idle(struct ttm_buffer_object *bo,
 	 */
 	err = dma_fence_wait(bo->moving, true);
 	if (unlikely(err != 0)) {
-		ret = (err != -ERESTARTSYS) ? VM_FAULT_SIGBUS :
-			VM_FAULT_NOPAGE;
+		ret = (err != -ERESTARTSYS) ? VM_FAULT_SIGBUS : VM_FAULT_NOPAGE;
 		goto out_unlock;
 	}
 
@@ -106,8 +105,8 @@ static unsigned long ttm_bo_io_mem_pfn(struct ttm_buffer_object *bo,
 	if (bdev->driver->io_mem_pfn)
 		return bdev->driver->io_mem_pfn(bo, page_offset);
 
-	return ((bo->mem.bus.base + bo->mem.bus.offset) >> PAGE_SHIFT)
-		+ page_offset;
+	return ((bo->mem.bus.base + bo->mem.bus.offset) >> PAGE_SHIFT) +
+	       page_offset;
 }
 
 /**
@@ -132,13 +131,11 @@ static unsigned long ttm_bo_io_mem_pfn(struct ttm_buffer_object *bo,
  *    VM_FAULT_NOPAGE if blocking wait and retrying was not allowed.
  */
 #ifndef HAVE_VM_FAULT_ADDRESS_VMA
-vm_fault_t ttm_bo_vm_reserve(struct ttm_buffer_object *bo,
-			     struct vm_fault *vmf,
+vm_fault_t ttm_bo_vm_reserve(struct ttm_buffer_object *bo, struct vm_fault *vmf,
 			     struct vm_area_struct *vma)
 {
 #else
-vm_fault_t ttm_bo_vm_reserve(struct ttm_buffer_object *bo,
-				 struct vm_fault *vmf)
+vm_fault_t ttm_bo_vm_reserve(struct ttm_buffer_object *bo, struct vm_fault *vmf)
 {
 	struct vm_area_struct *vma = vmf->vma;
 #endif
@@ -153,8 +150,8 @@ vm_fault_t ttm_bo_vm_reserve(struct ttm_buffer_object *bo,
 			if (!(vmf->flags & FAULT_FLAG_RETRY_NOWAIT)) {
 				ttm_bo_get(bo);
 				up_read(&vma->vm_mm->mmap_sem);
-				if (!dma_resv_lock_interruptible(amdkcl_ttm_resvp(bo),
-								 NULL))
+				if (!dma_resv_lock_interruptible(
+					    amdkcl_ttm_resvp(bo), NULL))
 					dma_resv_unlock(amdkcl_ttm_resvp(bo));
 				ttm_bo_put(bo);
 			}
@@ -190,13 +187,11 @@ EXPORT_SYMBOL(ttm_bo_vm_reserve);
  */
 #ifndef HAVE_VM_FAULT_ADDRESS_VMA
 vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf,
-				    struct vm_area_struct *vma,
-				    pgprot_t prot,
+				    struct vm_area_struct *vma, pgprot_t prot,
 				    pgoff_t num_prefault)
 {
 #else
-vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf,
-				    pgprot_t prot,
+vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf, pgprot_t prot,
 				    pgoff_t num_prefault)
 {
 	struct vm_area_struct *vma = vmf->vma;
@@ -216,8 +211,7 @@ vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf,
 #else
 	unsigned long address = vmf->address;
 #endif
-	struct ttm_mem_type_manager *man =
-		&bdev->man[bo->mem.mem_type];
+	struct ttm_mem_type_manager *man = &bdev->man[bo->mem.mem_type];
 
 	/*
 	 * Refuse to fault imported pages. This should be handled
@@ -266,9 +260,9 @@ vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf,
 	}
 
 	page_offset = ((address - vma->vm_start) >> PAGE_SHIFT) +
-		vma->vm_pgoff - drm_vma_node_start(&bo->base.vma_node);
+		      vma->vm_pgoff - drm_vma_node_start(&bo->base.vma_node);
 	page_last = vma_pages(vma) + vma->vm_pgoff -
-		drm_vma_node_start(&bo->base.vma_node);
+		    drm_vma_node_start(&bo->base.vma_node);
 
 	if (unlikely(page_offset >= bo->num_pages)) {
 		ret = VM_FAULT_SIGBUS;
@@ -312,7 +306,7 @@ vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf,
 				break;
 			}
 			page->index = drm_vma_node_start(&bo->base.vma_node) +
-				page_offset;
+				      page_offset;
 			pfn = page_to_pfn(page);
 		}
 
@@ -325,9 +319,12 @@ vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf,
 		 * See vmf_insert_mixed_prot() for a discussion.
 		 */
 		if (vma->vm_flags & VM_MIXEDMAP)
-			ret = vmf_insert_mixed_prot(vma, address,
-						    __pfn_to_pfn_t(pfn, PFN_DEV | (bo->ssg_can_map ? PFN_MAP : 0)),
-						    prot);
+			ret = vmf_insert_mixed_prot(
+				vma, address,
+				__pfn_to_pfn_t(pfn, PFN_DEV | (bo->ssg_can_map ?
+								       PFN_MAP :
+								       0)),
+				prot);
 		else
 			ret = vmf_insert_pfn_prot(vma, address, pfn, prot);
 
@@ -405,8 +402,8 @@ void ttm_bo_vm_close(struct vm_area_struct *vma)
 EXPORT_SYMBOL(ttm_bo_vm_close);
 
 static int ttm_bo_vm_access_kmap(struct ttm_buffer_object *bo,
-				 unsigned long offset,
-				 uint8_t *buf, int len, int write)
+				 unsigned long offset, uint8_t *buf, int len,
+				 int write)
 {
 	unsigned long page = offset >> PAGE_SHIFT;
 	unsigned long bytes_left = len;
@@ -443,10 +440,10 @@ static int ttm_bo_vm_access_kmap(struct ttm_buffer_object *bo,
 	return len;
 }
 
-int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,
-		     void *buf, int len, int write)
+int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr, void *buf,
+		     int len, int write)
 {
-	unsigned long offset = (addr) - vma->vm_start;
+	unsigned long offset = (addr)-vma->vm_start;
 	struct ttm_buffer_object *bo = vma->vm_private_data;
 	int ret;
 
@@ -470,8 +467,8 @@ int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr,
 		break;
 	default:
 		if (bo->bdev->driver->access_memory)
-			ret = bo->bdev->driver->access_memory(
-				bo, offset, buf, len, write);
+			ret = bo->bdev->driver->access_memory(bo, offset, buf,
+							      len, write);
 		else
 			ret = -EIO;
 	}
@@ -513,7 +510,8 @@ static struct ttm_buffer_object *ttm_bo_vm_lookup(struct ttm_bo_device *bdev,
 	return bo;
 }
 
-static void ttm_bo_mmap_vma_setup(struct ttm_buffer_object *bo, struct vm_area_struct *vma)
+static void ttm_bo_mmap_vma_setup(struct ttm_buffer_object *bo,
+				  struct vm_area_struct *vma)
 {
 	vma->vm_ops = &ttm_bo_vm_ops;
 
@@ -532,7 +530,8 @@ static void ttm_bo_mmap_vma_setup(struct ttm_buffer_object *bo, struct vm_area_s
 	 * VM_MIXEDMAP on all mappings. See freedesktop.org bug #75719
 	 */
 	vma->vm_flags |= VM_MIXEDMAP;
-	vma->vm_flags |= (bo->ssg_can_map ? 0 : VM_IO) | VM_DONTEXPAND | VM_DONTDUMP;
+	vma->vm_flags |=
+		(bo->ssg_can_map ? 0 : VM_IO) | VM_DONTEXPAND | VM_DONTDUMP;
 }
 
 int ttm_bo_mmap(struct file *filp, struct vm_area_struct *vma,
-- 
2.28.0


From 4962e794a0a6005de7c1b5c143684a3e200f870f Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Sun, 14 Jun 2020 13:58:28 +0200
Subject: [PATCH 03/18] drm/dkms: convert hardcoded list of OS names into a
 default case

---
 amd/dkms/Makefile | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/amd/dkms/Makefile b/amd/dkms/Makefile
index 45db31a..b1332ec 100644
--- a/amd/dkms/Makefile
+++ b/amd/dkms/Makefile
@@ -44,6 +44,9 @@ else
 DRM_VER=$(shell sed -n 's/^VERSION = \(.*\)/\1/p' $(kdir)/Makefile)
 DRM_PATCH=$(shell sed -n 's/^PATCHLEVEL = \(.*\)/\1/p' $(kdir)/Makefile)
 endif
+else
+DRM_VER=$(shell sed -n 's/^VERSION = \(.*\)/\1/p' $(kdir)/Makefile)
+DRM_PATCH=$(shell sed -n 's/^PATCHLEVEL = \(.*\)/\1/p' $(kdir)/Makefile)
 endif
 
 subdir-ccflags-y += \
-- 
2.28.0


From 42a25252e24d9ec1f9aa60ef60b3d5e79c1832a2 Mon Sep 17 00:00:00 2001
From: Bjorn Helgaas <bhelgaas@google.com>
Date: Thu, 2 Apr 2020 14:26:43 -0500
Subject: [PATCH 04/18] Merge branch 'pci/resource'

  - Use ioremap(), not phys_to_virt() for platform ROM, to fix video ROM
    mapping with CONFIG_HIGHMEM (Mikel Rychliski)

  - Add support for root bus sizing so we don't have to assume host bridge
    windows are known a priori (Ivan Kokshaysky)

  - Fix alpha Nautilus PCI setup, which has been broken since we started
    enforcing window limits in resource allocation (Ivan Kokshaysky)

* pci/resource:
  alpha: Fix nautilus PCI setup
  PCI: Add support for root bus sizing
  PCI: Use ioremap(), not phys_to_virt() for platform ROM
---
 amd/amdgpu/amdgpu_bios.c | 31 ++++++++++++++++++-------------
 1 file changed, 18 insertions(+), 13 deletions(-)

diff --git a/amd/amdgpu/amdgpu_bios.c b/amd/amdgpu/amdgpu_bios.c
index 50dff69..b1172d9 100644
--- a/amd/amdgpu/amdgpu_bios.c
+++ b/amd/amdgpu/amdgpu_bios.c
@@ -192,30 +192,35 @@ static bool amdgpu_read_bios_from_rom(struct amdgpu_device *adev)
 
 static bool amdgpu_read_platform_bios(struct amdgpu_device *adev)
 {
-	uint8_t __iomem *bios;
-	size_t size;
+	phys_addr_t rom = adev->pdev->rom;
+	size_t romlen = adev->pdev->romlen;
+	void __iomem *bios;
 
 	adev->bios = NULL;
 
-	bios = pci_platform_rom(adev->pdev, &size);
-	if (!bios) {
+	if (!rom || romlen == 0)
 		return false;
-	}
 
-	adev->bios = kzalloc(size, GFP_KERNEL);
-	if (adev->bios == NULL)
+	adev->bios = kzalloc(romlen, GFP_KERNEL);
+	if (!adev->bios)
 		return false;
 
-	memcpy_fromio(adev->bios, bios, size);
+	bios = ioremap(rom, romlen);
+	if (!bios)
+		goto free_bios;
 
-	if (!check_atom_bios(adev->bios, size)) {
-		kfree(adev->bios);
-		return false;
-	}
+	memcpy_fromio(adev->bios, bios, romlen);
+	iounmap(bios);
 
-	adev->bios_size = size;
+	if (!check_atom_bios(adev->bios, romlen))
+		goto free_bios;
+
+	adev->bios_size = romlen;
 
 	return true;
+free_bios:
+	kfree(adev->bios);
+	return false;
 }
 
 #ifdef CONFIG_ACPI
-- 
2.28.0


From c9708ddda05b895b35e1f2c38065ac3007912c3e Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Mon, 15 Jun 2020 12:54:45 +0200
Subject: [PATCH 05/18] amd/amdkcl: avoid kallsyms_lookup_name for 5.7+

---
 amd/amdkcl/kcl_common.h | 36 +++++++++++++++++++++++++++---------
 amd/amdkcl/symbols      |  4 ++++
 2 files changed, 31 insertions(+), 9 deletions(-)

diff --git a/amd/amdkcl/kcl_common.h b/amd/amdkcl/kcl_common.h
index 650eef5..eb2adce 100644
--- a/amd/amdkcl/kcl_common.h
+++ b/amd/amdkcl/kcl_common.h
@@ -9,6 +9,20 @@
 #include <linux/kallsyms.h>
 #include <linux/bug.h>
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 33) &&                           \
+	LINUX_VERSION_CODE > KERNEL_VERSION(5, 7, 0)
+extern unsigned long (*_kcl_kallsyms_lookup_name)(const char *name);
+#endif
+static inline unsigned long kcl_kallsyms_lookup_name(const char *name)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 33) &&                           \
+	LINUX_VERSION_CODE > KERNEL_VERSION(5, 7, 0)
+	return _kcl_kallsyms_lookup_name(name);
+#else
+	return kallsyms_lookup_name(name);
+#endif
+}
+
 static inline void *amdkcl_fp_setup(const char *symbol, void *fp_stup)
 {
 	unsigned long addr;
@@ -18,9 +32,13 @@ static inline void *amdkcl_fp_setup(const char *symbol, void *fp_stup)
 	if (addr == 0) {
 		fp = fp_stup;
 		if (fp != NULL)
-			printk_once(KERN_WARNING "Warning: fail to get symbol %s, replace it with kcl stub\n", symbol);
+			printk_once(
+				KERN_WARNING
+				"Warning: fail to get symbol %s, replace it with kcl stub\n",
+				symbol);
 		else {
-			printk_once(KERN_ERR "Error: fail to get symbol %s\n", symbol);
+			printk_once(KERN_ERR "Error: fail to get symbol %s\n",
+				    symbol);
 			BUG();
 		}
 	} else {
@@ -33,12 +51,12 @@ static inline void *amdkcl_fp_setup(const char *symbol, void *fp_stup)
 /*
  * create dummy func
  */
-#define amdkcl_dummy_symbol(name, ret_type, ret, ...) \
-ret_type name(__VA_ARGS__) \
-{ \
-	pr_warn_once("%s is not supported\n", #name); \
-	ret ;\
-} \
-EXPORT_SYMBOL(name);
+#define amdkcl_dummy_symbol(name, ret_type, ret, ...)                          \
+	ret_type name(__VA_ARGS__)                                             \
+	{                                                                      \
+		pr_warn_once("%s is not supported\n", #name);                  \
+		ret;                                                           \
+	}                                                                      \
+	EXPORT_SYMBOL(name);
 
 #endif
diff --git a/amd/amdkcl/symbols b/amd/amdkcl/symbols
index fe16731..1f20262 100644
--- a/amd/amdkcl/symbols
+++ b/amd/amdkcl/symbols
@@ -1 +1,5 @@
 SYMS=""
+
+if version_lt 2.6.33 || version_gt 5.7.0; then
+    SYMS+=" kallsyms_lookup_name"
+fi
-- 
2.28.0


From c19c7c478e182af1386090b939ff18b8b1987be9 Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Mon, 15 Jun 2020 14:18:29 +0200
Subject: [PATCH 06/18] amd/amdkcl: replace kallsyms_lookup_name for 5.7.0+

---
 amd/amdkcl/kcl_common.h | 8 ++++----
 amd/amdkcl/symbols      | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/amd/amdkcl/kcl_common.h b/amd/amdkcl/kcl_common.h
index eb2adce..8992a0c 100644
--- a/amd/amdkcl/kcl_common.h
+++ b/amd/amdkcl/kcl_common.h
@@ -9,15 +9,15 @@
 #include <linux/kallsyms.h>
 #include <linux/bug.h>
 
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 33) &&                           \
-	LINUX_VERSION_CODE > KERNEL_VERSION(5, 7, 0)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 33)
 extern unsigned long (*_kcl_kallsyms_lookup_name)(const char *name);
 #endif
 static inline unsigned long kcl_kallsyms_lookup_name(const char *name)
 {
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 33) &&                           \
-	LINUX_VERSION_CODE > KERNEL_VERSION(5, 7, 0)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 33)
 	return _kcl_kallsyms_lookup_name(name);
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(5, 7, 0)
+	return (unsigned long)__symbol_get(name);
 #else
 	return kallsyms_lookup_name(name);
 #endif
diff --git a/amd/amdkcl/symbols b/amd/amdkcl/symbols
index 1f20262..05bcba0 100644
--- a/amd/amdkcl/symbols
+++ b/amd/amdkcl/symbols
@@ -1,5 +1,5 @@
 SYMS=""
 
-if version_lt 2.6.33 || version_gt 5.7.0; then
+if version_lt 2.6.33; then
     SYMS+=" kallsyms_lookup_name"
 fi
-- 
2.28.0


From b3ac2703bdb6ec530b86703006c1dc2897350d80 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Wed, 10 Jun 2020 11:56:53 +0300
Subject: [PATCH 07/18] drm/amdgpu: Fix a buffer overflow handling the serial
 number

The comments say that the serial number is a 16-digit HEX string so the
buffer needs to be at least 17 characters to hold the NUL terminator.

The other issue is that "size" returned from sprintf() is the number of
characters before the NUL terminator so the memcpy() wasn't copying the
terminator.  The serial number needs to be NUL terminated so that it
doesn't lead to a read overflow in amdgpu_device_get_serial_number().
Also it's just cleaner and faster to sprintf() directly to adev->serial[]
instead of using a temporary buffer.

Fixes: 81a16241114b ("drm/amdgpu: Add unique_id and serial_number for Arcturus v3")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
---
 amd/powerplay/arcturus_ppt.c | 1806 +++++++++++++++++++---------------
 1 file changed, 1002 insertions(+), 804 deletions(-)

diff --git a/amd/powerplay/arcturus_ppt.c b/amd/powerplay/arcturus_ppt.c
index 56dc20a..05e4cf5 100644
--- a/amd/powerplay/arcturus_ppt.c
+++ b/amd/powerplay/arcturus_ppt.c
@@ -56,156 +56,159 @@
 
 #define to_amdgpu_device(x) (container_of(x, struct amdgpu_device, pm.smu_i2c))
 
-#define MSG_MAP(msg, index, valid_in_vf) \
-	[SMU_MSG_##msg] = {1, (index), (valid_in_vf)}
-#define ARCTURUS_FEA_MAP(smu_feature, arcturus_feature) \
-	[smu_feature] = {1, (arcturus_feature)}
-
-#define SMU_FEATURES_LOW_MASK        0x00000000FFFFFFFF
-#define SMU_FEATURES_LOW_SHIFT       0
-#define SMU_FEATURES_HIGH_MASK       0xFFFFFFFF00000000
-#define SMU_FEATURES_HIGH_SHIFT      32
-
-#define SMC_DPM_FEATURE ( \
-	FEATURE_DPM_PREFETCHER_MASK | \
-	FEATURE_DPM_GFXCLK_MASK | \
-	FEATURE_DPM_UCLK_MASK | \
-	FEATURE_DPM_SOCCLK_MASK | \
-	FEATURE_DPM_MP0CLK_MASK | \
-	FEATURE_DPM_FCLK_MASK | \
-	FEATURE_DPM_XGMI_MASK)
+#define MSG_MAP(msg, index, valid_in_vf)                                       \
+	[SMU_MSG_##msg] = { 1, (index), (valid_in_vf) }
+#define ARCTURUS_FEA_MAP(smu_feature, arcturus_feature)                        \
+	[smu_feature] = { 1, (arcturus_feature) }
+
+#define SMU_FEATURES_LOW_MASK 0x00000000FFFFFFFF
+#define SMU_FEATURES_LOW_SHIFT 0
+#define SMU_FEATURES_HIGH_MASK 0xFFFFFFFF00000000
+#define SMU_FEATURES_HIGH_SHIFT 32
+
+#define SMC_DPM_FEATURE                                                        \
+	(FEATURE_DPM_PREFETCHER_MASK | FEATURE_DPM_GFXCLK_MASK |               \
+	 FEATURE_DPM_UCLK_MASK | FEATURE_DPM_SOCCLK_MASK |                     \
+	 FEATURE_DPM_MP0CLK_MASK | FEATURE_DPM_FCLK_MASK |                     \
+	 FEATURE_DPM_XGMI_MASK)
 
 /* possible frequency drift (1Mhz) */
-#define EPSILON				1
+#define EPSILON 1
 
 static struct smu_11_0_msg_mapping arcturus_message_map[SMU_MSG_MAX_COUNT] = {
-	MSG_MAP(TestMessage,			     PPSMC_MSG_TestMessage,			0),
-	MSG_MAP(GetSmuVersion,			     PPSMC_MSG_GetSmuVersion,			1),
-	MSG_MAP(GetDriverIfVersion,		     PPSMC_MSG_GetDriverIfVersion,		1),
-	MSG_MAP(SetAllowedFeaturesMaskLow,	     PPSMC_MSG_SetAllowedFeaturesMaskLow,	0),
-	MSG_MAP(SetAllowedFeaturesMaskHigh,	     PPSMC_MSG_SetAllowedFeaturesMaskHigh,	0),
-	MSG_MAP(EnableAllSmuFeatures,		     PPSMC_MSG_EnableAllSmuFeatures,		0),
-	MSG_MAP(DisableAllSmuFeatures,		     PPSMC_MSG_DisableAllSmuFeatures,		0),
-	MSG_MAP(EnableSmuFeaturesLow,		     PPSMC_MSG_EnableSmuFeaturesLow,		1),
-	MSG_MAP(EnableSmuFeaturesHigh,		     PPSMC_MSG_EnableSmuFeaturesHigh,		1),
-	MSG_MAP(DisableSmuFeaturesLow,		     PPSMC_MSG_DisableSmuFeaturesLow,		0),
-	MSG_MAP(DisableSmuFeaturesHigh,		     PPSMC_MSG_DisableSmuFeaturesHigh,		0),
-	MSG_MAP(GetEnabledSmuFeaturesLow,	     PPSMC_MSG_GetEnabledSmuFeaturesLow,	0),
-	MSG_MAP(GetEnabledSmuFeaturesHigh,	     PPSMC_MSG_GetEnabledSmuFeaturesHigh,	0),
-	MSG_MAP(SetDriverDramAddrHigh,		     PPSMC_MSG_SetDriverDramAddrHigh,		1),
-	MSG_MAP(SetDriverDramAddrLow,		     PPSMC_MSG_SetDriverDramAddrLow,		1),
-	MSG_MAP(SetToolsDramAddrHigh,		     PPSMC_MSG_SetToolsDramAddrHigh,		0),
-	MSG_MAP(SetToolsDramAddrLow,		     PPSMC_MSG_SetToolsDramAddrLow,		0),
-	MSG_MAP(TransferTableSmu2Dram,		     PPSMC_MSG_TransferTableSmu2Dram,		1),
-	MSG_MAP(TransferTableDram2Smu,		     PPSMC_MSG_TransferTableDram2Smu,		0),
-	MSG_MAP(UseDefaultPPTable,		     PPSMC_MSG_UseDefaultPPTable,		0),
-	MSG_MAP(UseBackupPPTable,		     PPSMC_MSG_UseBackupPPTable,		0),
-	MSG_MAP(SetSystemVirtualDramAddrHigh,	     PPSMC_MSG_SetSystemVirtualDramAddrHigh,	0),
-	MSG_MAP(SetSystemVirtualDramAddrLow,	     PPSMC_MSG_SetSystemVirtualDramAddrLow,	0),
-	MSG_MAP(EnterBaco,			     PPSMC_MSG_EnterBaco,			0),
-	MSG_MAP(ExitBaco,			     PPSMC_MSG_ExitBaco,			0),
-	MSG_MAP(ArmD3,				     PPSMC_MSG_ArmD3,				0),
-	MSG_MAP(SetSoftMinByFreq,		     PPSMC_MSG_SetSoftMinByFreq,		0),
-	MSG_MAP(SetSoftMaxByFreq,		     PPSMC_MSG_SetSoftMaxByFreq,		0),
-	MSG_MAP(SetHardMinByFreq,		     PPSMC_MSG_SetHardMinByFreq,		0),
-	MSG_MAP(SetHardMaxByFreq,		     PPSMC_MSG_SetHardMaxByFreq,		0),
-	MSG_MAP(GetMinDpmFreq,			     PPSMC_MSG_GetMinDpmFreq,			0),
-	MSG_MAP(GetMaxDpmFreq,			     PPSMC_MSG_GetMaxDpmFreq,			0),
-	MSG_MAP(GetDpmFreqByIndex,		     PPSMC_MSG_GetDpmFreqByIndex,		1),
-	MSG_MAP(SetWorkloadMask,		     PPSMC_MSG_SetWorkloadMask,			1),
-	MSG_MAP(SetDfSwitchType,		     PPSMC_MSG_SetDfSwitchType,			0),
-	MSG_MAP(GetVoltageByDpm,		     PPSMC_MSG_GetVoltageByDpm,			0),
-	MSG_MAP(GetVoltageByDpmOverdrive,	     PPSMC_MSG_GetVoltageByDpmOverdrive,	0),
-	MSG_MAP(SetPptLimit,			     PPSMC_MSG_SetPptLimit,			0),
-	MSG_MAP(GetPptLimit,			     PPSMC_MSG_GetPptLimit,			1),
-	MSG_MAP(PowerUpVcn0,			     PPSMC_MSG_PowerUpVcn0,			0),
-	MSG_MAP(PowerDownVcn0,			     PPSMC_MSG_PowerDownVcn0,			0),
-	MSG_MAP(PowerUpVcn1,			     PPSMC_MSG_PowerUpVcn1,			0),
-	MSG_MAP(PowerDownVcn1,			     PPSMC_MSG_PowerDownVcn1,			0),
-	MSG_MAP(PrepareMp1ForUnload,		     PPSMC_MSG_PrepareMp1ForUnload,		0),
-	MSG_MAP(PrepareMp1ForReset,		     PPSMC_MSG_PrepareMp1ForReset,		0),
-	MSG_MAP(PrepareMp1ForShutdown,		     PPSMC_MSG_PrepareMp1ForShutdown,		0),
-	MSG_MAP(SoftReset,			     PPSMC_MSG_SoftReset,			0),
-	MSG_MAP(RunAfllBtc,			     PPSMC_MSG_RunAfllBtc,			0),
-	MSG_MAP(RunDcBtc,			     PPSMC_MSG_RunDcBtc,			0),
-	MSG_MAP(DramLogSetDramAddrHigh,		     PPSMC_MSG_DramLogSetDramAddrHigh,		0),
-	MSG_MAP(DramLogSetDramAddrLow,		     PPSMC_MSG_DramLogSetDramAddrLow,		0),
-	MSG_MAP(DramLogSetDramSize,		     PPSMC_MSG_DramLogSetDramSize,		0),
-	MSG_MAP(GetDebugData,			     PPSMC_MSG_GetDebugData,			0),
-	MSG_MAP(WaflTest,			     PPSMC_MSG_WaflTest,			0),
-	MSG_MAP(SetXgmiMode,			     PPSMC_MSG_SetXgmiMode,			0),
-	MSG_MAP(SetMemoryChannelEnable,		     PPSMC_MSG_SetMemoryChannelEnable,		0),
-	MSG_MAP(DFCstateControl,		     PPSMC_MSG_DFCstateControl,			0),
-	MSG_MAP(GmiPwrDnControl,		     PPSMC_MSG_GmiPwrDnControl,			0),
-	MSG_MAP(ReadSerialNumTop32,		     PPSMC_MSG_ReadSerialNumTop32,		1),
-	MSG_MAP(ReadSerialNumBottom32,		     PPSMC_MSG_ReadSerialNumBottom32,		1),
+	MSG_MAP(TestMessage, PPSMC_MSG_TestMessage, 0),
+	MSG_MAP(GetSmuVersion, PPSMC_MSG_GetSmuVersion, 1),
+	MSG_MAP(GetDriverIfVersion, PPSMC_MSG_GetDriverIfVersion, 1),
+	MSG_MAP(SetAllowedFeaturesMaskLow, PPSMC_MSG_SetAllowedFeaturesMaskLow,
+		0),
+	MSG_MAP(SetAllowedFeaturesMaskHigh,
+		PPSMC_MSG_SetAllowedFeaturesMaskHigh, 0),
+	MSG_MAP(EnableAllSmuFeatures, PPSMC_MSG_EnableAllSmuFeatures, 0),
+	MSG_MAP(DisableAllSmuFeatures, PPSMC_MSG_DisableAllSmuFeatures, 0),
+	MSG_MAP(EnableSmuFeaturesLow, PPSMC_MSG_EnableSmuFeaturesLow, 1),
+	MSG_MAP(EnableSmuFeaturesHigh, PPSMC_MSG_EnableSmuFeaturesHigh, 1),
+	MSG_MAP(DisableSmuFeaturesLow, PPSMC_MSG_DisableSmuFeaturesLow, 0),
+	MSG_MAP(DisableSmuFeaturesHigh, PPSMC_MSG_DisableSmuFeaturesHigh, 0),
+	MSG_MAP(GetEnabledSmuFeaturesLow, PPSMC_MSG_GetEnabledSmuFeaturesLow,
+		0),
+	MSG_MAP(GetEnabledSmuFeaturesHigh, PPSMC_MSG_GetEnabledSmuFeaturesHigh,
+		0),
+	MSG_MAP(SetDriverDramAddrHigh, PPSMC_MSG_SetDriverDramAddrHigh, 1),
+	MSG_MAP(SetDriverDramAddrLow, PPSMC_MSG_SetDriverDramAddrLow, 1),
+	MSG_MAP(SetToolsDramAddrHigh, PPSMC_MSG_SetToolsDramAddrHigh, 0),
+	MSG_MAP(SetToolsDramAddrLow, PPSMC_MSG_SetToolsDramAddrLow, 0),
+	MSG_MAP(TransferTableSmu2Dram, PPSMC_MSG_TransferTableSmu2Dram, 1),
+	MSG_MAP(TransferTableDram2Smu, PPSMC_MSG_TransferTableDram2Smu, 0),
+	MSG_MAP(UseDefaultPPTable, PPSMC_MSG_UseDefaultPPTable, 0),
+	MSG_MAP(UseBackupPPTable, PPSMC_MSG_UseBackupPPTable, 0),
+	MSG_MAP(SetSystemVirtualDramAddrHigh,
+		PPSMC_MSG_SetSystemVirtualDramAddrHigh, 0),
+	MSG_MAP(SetSystemVirtualDramAddrLow,
+		PPSMC_MSG_SetSystemVirtualDramAddrLow, 0),
+	MSG_MAP(EnterBaco, PPSMC_MSG_EnterBaco, 0),
+	MSG_MAP(ExitBaco, PPSMC_MSG_ExitBaco, 0),
+	MSG_MAP(ArmD3, PPSMC_MSG_ArmD3, 0),
+	MSG_MAP(SetSoftMinByFreq, PPSMC_MSG_SetSoftMinByFreq, 0),
+	MSG_MAP(SetSoftMaxByFreq, PPSMC_MSG_SetSoftMaxByFreq, 0),
+	MSG_MAP(SetHardMinByFreq, PPSMC_MSG_SetHardMinByFreq, 0),
+	MSG_MAP(SetHardMaxByFreq, PPSMC_MSG_SetHardMaxByFreq, 0),
+	MSG_MAP(GetMinDpmFreq, PPSMC_MSG_GetMinDpmFreq, 0),
+	MSG_MAP(GetMaxDpmFreq, PPSMC_MSG_GetMaxDpmFreq, 0),
+	MSG_MAP(GetDpmFreqByIndex, PPSMC_MSG_GetDpmFreqByIndex, 1),
+	MSG_MAP(SetWorkloadMask, PPSMC_MSG_SetWorkloadMask, 1),
+	MSG_MAP(SetDfSwitchType, PPSMC_MSG_SetDfSwitchType, 0),
+	MSG_MAP(GetVoltageByDpm, PPSMC_MSG_GetVoltageByDpm, 0),
+	MSG_MAP(GetVoltageByDpmOverdrive, PPSMC_MSG_GetVoltageByDpmOverdrive,
+		0),
+	MSG_MAP(SetPptLimit, PPSMC_MSG_SetPptLimit, 0),
+	MSG_MAP(GetPptLimit, PPSMC_MSG_GetPptLimit, 1),
+	MSG_MAP(PowerUpVcn0, PPSMC_MSG_PowerUpVcn0, 0),
+	MSG_MAP(PowerDownVcn0, PPSMC_MSG_PowerDownVcn0, 0),
+	MSG_MAP(PowerUpVcn1, PPSMC_MSG_PowerUpVcn1, 0),
+	MSG_MAP(PowerDownVcn1, PPSMC_MSG_PowerDownVcn1, 0),
+	MSG_MAP(PrepareMp1ForUnload, PPSMC_MSG_PrepareMp1ForUnload, 0),
+	MSG_MAP(PrepareMp1ForReset, PPSMC_MSG_PrepareMp1ForReset, 0),
+	MSG_MAP(PrepareMp1ForShutdown, PPSMC_MSG_PrepareMp1ForShutdown, 0),
+	MSG_MAP(SoftReset, PPSMC_MSG_SoftReset, 0),
+	MSG_MAP(RunAfllBtc, PPSMC_MSG_RunAfllBtc, 0),
+	MSG_MAP(RunDcBtc, PPSMC_MSG_RunDcBtc, 0),
+	MSG_MAP(DramLogSetDramAddrHigh, PPSMC_MSG_DramLogSetDramAddrHigh, 0),
+	MSG_MAP(DramLogSetDramAddrLow, PPSMC_MSG_DramLogSetDramAddrLow, 0),
+	MSG_MAP(DramLogSetDramSize, PPSMC_MSG_DramLogSetDramSize, 0),
+	MSG_MAP(GetDebugData, PPSMC_MSG_GetDebugData, 0),
+	MSG_MAP(WaflTest, PPSMC_MSG_WaflTest, 0),
+	MSG_MAP(SetXgmiMode, PPSMC_MSG_SetXgmiMode, 0),
+	MSG_MAP(SetMemoryChannelEnable, PPSMC_MSG_SetMemoryChannelEnable, 0),
+	MSG_MAP(DFCstateControl, PPSMC_MSG_DFCstateControl, 0),
+	MSG_MAP(GmiPwrDnControl, PPSMC_MSG_GmiPwrDnControl, 0),
+	MSG_MAP(ReadSerialNumTop32, PPSMC_MSG_ReadSerialNumTop32, 1),
+	MSG_MAP(ReadSerialNumBottom32, PPSMC_MSG_ReadSerialNumBottom32, 1),
 };
 
 static struct smu_11_0_cmn2aisc_mapping arcturus_clk_map[SMU_CLK_COUNT] = {
-	CLK_MAP(GFXCLK, PPCLK_GFXCLK),
-	CLK_MAP(SCLK,	PPCLK_GFXCLK),
-	CLK_MAP(SOCCLK, PPCLK_SOCCLK),
-	CLK_MAP(FCLK, PPCLK_FCLK),
-	CLK_MAP(UCLK, PPCLK_UCLK),
-	CLK_MAP(MCLK, PPCLK_UCLK),
-	CLK_MAP(DCLK, PPCLK_DCLK),
-	CLK_MAP(VCLK, PPCLK_VCLK),
+	CLK_MAP(GFXCLK, PPCLK_GFXCLK), CLK_MAP(SCLK, PPCLK_GFXCLK),
+	CLK_MAP(SOCCLK, PPCLK_SOCCLK), CLK_MAP(FCLK, PPCLK_FCLK),
+	CLK_MAP(UCLK, PPCLK_UCLK),     CLK_MAP(MCLK, PPCLK_UCLK),
+	CLK_MAP(DCLK, PPCLK_DCLK),     CLK_MAP(VCLK, PPCLK_VCLK),
 };
 
-static struct smu_11_0_cmn2aisc_mapping arcturus_feature_mask_map[SMU_FEATURE_COUNT] = {
-	FEA_MAP(DPM_PREFETCHER),
-	FEA_MAP(DPM_GFXCLK),
-	FEA_MAP(DPM_UCLK),
-	FEA_MAP(DPM_SOCCLK),
-	FEA_MAP(DPM_FCLK),
-	FEA_MAP(DPM_MP0CLK),
-	ARCTURUS_FEA_MAP(SMU_FEATURE_XGMI_BIT, FEATURE_DPM_XGMI_BIT),
-	FEA_MAP(DS_GFXCLK),
-	FEA_MAP(DS_SOCCLK),
-	FEA_MAP(DS_LCLK),
-	FEA_MAP(DS_FCLK),
-	FEA_MAP(DS_UCLK),
-	FEA_MAP(GFX_ULV),
-	ARCTURUS_FEA_MAP(SMU_FEATURE_VCN_PG_BIT, FEATURE_DPM_VCN_BIT),
-	FEA_MAP(RSMU_SMN_CG),
-	FEA_MAP(WAFL_CG),
-	FEA_MAP(PPT),
-	FEA_MAP(TDC),
-	FEA_MAP(APCC_PLUS),
-	FEA_MAP(VR0HOT),
-	FEA_MAP(VR1HOT),
-	FEA_MAP(FW_CTF),
-	FEA_MAP(FAN_CONTROL),
-	FEA_MAP(THERMAL),
-	FEA_MAP(OUT_OF_BAND_MONITOR),
-	FEA_MAP(TEMP_DEPENDENT_VMIN),
-};
+static struct smu_11_0_cmn2aisc_mapping
+	arcturus_feature_mask_map[SMU_FEATURE_COUNT] = {
+		FEA_MAP(DPM_PREFETCHER),
+		FEA_MAP(DPM_GFXCLK),
+		FEA_MAP(DPM_UCLK),
+		FEA_MAP(DPM_SOCCLK),
+		FEA_MAP(DPM_FCLK),
+		FEA_MAP(DPM_MP0CLK),
+		ARCTURUS_FEA_MAP(SMU_FEATURE_XGMI_BIT, FEATURE_DPM_XGMI_BIT),
+		FEA_MAP(DS_GFXCLK),
+		FEA_MAP(DS_SOCCLK),
+		FEA_MAP(DS_LCLK),
+		FEA_MAP(DS_FCLK),
+		FEA_MAP(DS_UCLK),
+		FEA_MAP(GFX_ULV),
+		ARCTURUS_FEA_MAP(SMU_FEATURE_VCN_PG_BIT, FEATURE_DPM_VCN_BIT),
+		FEA_MAP(RSMU_SMN_CG),
+		FEA_MAP(WAFL_CG),
+		FEA_MAP(PPT),
+		FEA_MAP(TDC),
+		FEA_MAP(APCC_PLUS),
+		FEA_MAP(VR0HOT),
+		FEA_MAP(VR1HOT),
+		FEA_MAP(FW_CTF),
+		FEA_MAP(FAN_CONTROL),
+		FEA_MAP(THERMAL),
+		FEA_MAP(OUT_OF_BAND_MONITOR),
+		FEA_MAP(TEMP_DEPENDENT_VMIN),
+	};
 
 static struct smu_11_0_cmn2aisc_mapping arcturus_table_map[SMU_TABLE_COUNT] = {
-	TAB_MAP(PPTABLE),
-	TAB_MAP(AVFS),
-	TAB_MAP(AVFS_PSM_DEBUG),
-	TAB_MAP(AVFS_FUSE_OVERRIDE),
-	TAB_MAP(PMSTATUSLOG),
-	TAB_MAP(SMU_METRICS),
-	TAB_MAP(DRIVER_SMU_CONFIG),
-	TAB_MAP(OVERDRIVE),
-	TAB_MAP(I2C_COMMANDS),
-	TAB_MAP(ACTIVITY_MONITOR_COEFF),
-};
-
-static struct smu_11_0_cmn2aisc_mapping arcturus_pwr_src_map[SMU_POWER_SOURCE_COUNT] = {
-	PWR_MAP(AC),
-	PWR_MAP(DC),
+	TAB_MAP(PPTABLE),	    TAB_MAP(AVFS),
+	TAB_MAP(AVFS_PSM_DEBUG),    TAB_MAP(AVFS_FUSE_OVERRIDE),
+	TAB_MAP(PMSTATUSLOG),	    TAB_MAP(SMU_METRICS),
+	TAB_MAP(DRIVER_SMU_CONFIG), TAB_MAP(OVERDRIVE),
+	TAB_MAP(I2C_COMMANDS),	    TAB_MAP(ACTIVITY_MONITOR_COEFF),
 };
 
-static struct smu_11_0_cmn2aisc_mapping arcturus_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {
-	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT,	WORKLOAD_PPLIB_DEFAULT_BIT),
-	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_POWERSAVING,		WORKLOAD_PPLIB_POWER_SAVING_BIT),
-	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_VIDEO,		WORKLOAD_PPLIB_VIDEO_BIT),
-	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_COMPUTE,		WORKLOAD_PPLIB_COMPUTE_BIT),
-	WORKLOAD_MAP(PP_SMC_POWER_PROFILE_CUSTOM,		WORKLOAD_PPLIB_CUSTOM_BIT),
-};
+static struct smu_11_0_cmn2aisc_mapping
+	arcturus_pwr_src_map[SMU_POWER_SOURCE_COUNT] = {
+		PWR_MAP(AC),
+		PWR_MAP(DC),
+	};
+
+static struct smu_11_0_cmn2aisc_mapping
+	arcturus_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {
+		WORKLOAD_MAP(PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT,
+			     WORKLOAD_PPLIB_DEFAULT_BIT),
+		WORKLOAD_MAP(PP_SMC_POWER_PROFILE_POWERSAVING,
+			     WORKLOAD_PPLIB_POWER_SAVING_BIT),
+		WORKLOAD_MAP(PP_SMC_POWER_PROFILE_VIDEO,
+			     WORKLOAD_PPLIB_VIDEO_BIT),
+		WORKLOAD_MAP(PP_SMC_POWER_PROFILE_COMPUTE,
+			     WORKLOAD_PPLIB_COMPUTE_BIT),
+		WORKLOAD_MAP(PP_SMC_POWER_PROFILE_CUSTOM,
+			     WORKLOAD_PPLIB_CUSTOM_BIT),
+	};
 
 static int arcturus_get_smu_msg_index(struct smu_context *smc, uint32_t index)
 {
@@ -240,7 +243,8 @@ static int arcturus_get_smu_clk_index(struct smu_context *smc, uint32_t index)
 	return mapping.map_to;
 }
 
-static int arcturus_get_smu_feature_index(struct smu_context *smc, uint32_t index)
+static int arcturus_get_smu_feature_index(struct smu_context *smc,
+					  uint32_t index)
 {
 	struct smu_11_0_cmn2aisc_mapping mapping;
 
@@ -280,14 +284,16 @@ static int arcturus_get_pwr_src_index(struct smu_context *smc, uint32_t index)
 
 	mapping = arcturus_pwr_src_map[index];
 	if (!(mapping.valid_mapping)) {
-		dev_warn(smc->adev->dev, "Unsupported SMU power source: %d\n", index);
+		dev_warn(smc->adev->dev, "Unsupported SMU power source: %d\n",
+			 index);
 		return -EINVAL;
 	}
 
 	return mapping.map_to;
 }
 
-static int arcturus_get_workload_type(struct smu_context *smu, enum PP_SMC_POWER_PROFILE profile)
+static int arcturus_get_workload_type(struct smu_context *smu,
+				      enum PP_SMC_POWER_PROFILE profile)
 {
 	struct smu_11_0_cmn2aisc_mapping mapping;
 
@@ -301,12 +307,13 @@ static int arcturus_get_workload_type(struct smu_context *smu, enum PP_SMC_POWER
 	return mapping.map_to;
 }
 
-static int arcturus_tables_init(struct smu_context *smu, struct smu_table *tables)
+static int arcturus_tables_init(struct smu_context *smu,
+				struct smu_table *tables)
 {
 	struct smu_table_context *smu_table = &smu->smu_table;
 
-	SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t),
-		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
+	SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t), PAGE_SIZE,
+		       AMDGPU_GEM_DOMAIN_VRAM);
 
 	SMU_TABLE_INIT(tables, SMU_TABLE_PMSTATUSLOG, SMU11_TOOL_SIZE,
 		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
@@ -315,7 +322,7 @@ static int arcturus_tables_init(struct smu_context *smu, struct smu_table *table
 		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
 
 	SMU_TABLE_INIT(tables, SMU_TABLE_I2C_COMMANDS, sizeof(SwI2cRequest_t),
-			       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
+		       PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
 
 	SMU_TABLE_INIT(tables, SMU_TABLE_ACTIVITY_MONITOR_COEFF,
 		       sizeof(DpmActivityMonitorCoeffInt_t), PAGE_SIZE,
@@ -333,28 +340,28 @@ static int arcturus_allocate_dpm_context(struct smu_context *smu)
 {
 	struct smu_dpm_context *smu_dpm = &smu->smu_dpm;
 
-	smu_dpm->dpm_context = kzalloc(sizeof(struct smu_11_0_dpm_context),
-				       GFP_KERNEL);
+	smu_dpm->dpm_context =
+		kzalloc(sizeof(struct smu_11_0_dpm_context), GFP_KERNEL);
 	if (!smu_dpm->dpm_context)
 		return -ENOMEM;
 	smu_dpm->dpm_context_size = sizeof(struct smu_11_0_dpm_context);
 
-	smu_dpm->dpm_current_power_state = kzalloc(sizeof(struct smu_power_state),
-				       GFP_KERNEL);
+	smu_dpm->dpm_current_power_state =
+		kzalloc(sizeof(struct smu_power_state), GFP_KERNEL);
 	if (!smu_dpm->dpm_current_power_state)
 		return -ENOMEM;
 
-	smu_dpm->dpm_request_power_state = kzalloc(sizeof(struct smu_power_state),
-				       GFP_KERNEL);
+	smu_dpm->dpm_request_power_state =
+		kzalloc(sizeof(struct smu_power_state), GFP_KERNEL);
 	if (!smu_dpm->dpm_request_power_state)
 		return -ENOMEM;
 
 	return 0;
 }
 
-static int
-arcturus_get_allowed_feature_mask(struct smu_context *smu,
-				  uint32_t *feature_mask, uint32_t num)
+static int arcturus_get_allowed_feature_mask(struct smu_context *smu,
+					     uint32_t *feature_mask,
+					     uint32_t num)
 {
 	if (num > 2)
 		return -EINVAL;
@@ -375,8 +382,7 @@ static int arcturus_set_default_dpm_table(struct smu_context *smu)
 	/* socclk dpm table setup */
 	dpm_table = &dpm_context->dpm_tables.soc_table;
 	if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
-		ret = smu_v11_0_set_single_dpm_table(smu,
-						     SMU_SOCCLK,
+		ret = smu_v11_0_set_single_dpm_table(smu, SMU_SOCCLK,
 						     dpm_table);
 		if (ret)
 			return ret;
@@ -384,7 +390,8 @@ static int arcturus_set_default_dpm_table(struct smu_context *smu)
 			!driver_ppt->DpmDescriptor[PPCLK_SOCCLK].SnapToDiscrete;
 	} else {
 		dpm_table->count = 1;
-		dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100;
+		dpm_table->dpm_levels[0].value =
+			smu->smu_table.boot_values.socclk / 100;
 		dpm_table->dpm_levels[0].enabled = true;
 		dpm_table->min = dpm_table->dpm_levels[0].value;
 		dpm_table->max = dpm_table->dpm_levels[0].value;
@@ -393,8 +400,7 @@ static int arcturus_set_default_dpm_table(struct smu_context *smu)
 	/* gfxclk dpm table setup */
 	dpm_table = &dpm_context->dpm_tables.gfx_table;
 	if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT)) {
-		ret = smu_v11_0_set_single_dpm_table(smu,
-						     SMU_GFXCLK,
+		ret = smu_v11_0_set_single_dpm_table(smu, SMU_GFXCLK,
 						     dpm_table);
 		if (ret)
 			return ret;
@@ -402,7 +408,8 @@ static int arcturus_set_default_dpm_table(struct smu_context *smu)
 			!driver_ppt->DpmDescriptor[PPCLK_GFXCLK].SnapToDiscrete;
 	} else {
 		dpm_table->count = 1;
-		dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100;
+		dpm_table->dpm_levels[0].value =
+			smu->smu_table.boot_values.gfxclk / 100;
 		dpm_table->dpm_levels[0].enabled = true;
 		dpm_table->min = dpm_table->dpm_levels[0].value;
 		dpm_table->max = dpm_table->dpm_levels[0].value;
@@ -411,16 +418,15 @@ static int arcturus_set_default_dpm_table(struct smu_context *smu)
 	/* memclk dpm table setup */
 	dpm_table = &dpm_context->dpm_tables.uclk_table;
 	if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) {
-		ret = smu_v11_0_set_single_dpm_table(smu,
-						     SMU_UCLK,
-						     dpm_table);
+		ret = smu_v11_0_set_single_dpm_table(smu, SMU_UCLK, dpm_table);
 		if (ret)
 			return ret;
 		dpm_table->is_fine_grained =
 			!driver_ppt->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete;
 	} else {
 		dpm_table->count = 1;
-		dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.uclk / 100;
+		dpm_table->dpm_levels[0].value =
+			smu->smu_table.boot_values.uclk / 100;
 		dpm_table->dpm_levels[0].enabled = true;
 		dpm_table->min = dpm_table->dpm_levels[0].value;
 		dpm_table->max = dpm_table->dpm_levels[0].value;
@@ -429,16 +435,15 @@ static int arcturus_set_default_dpm_table(struct smu_context *smu)
 	/* fclk dpm table setup */
 	dpm_table = &dpm_context->dpm_tables.fclk_table;
 	if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_FCLK_BIT)) {
-		ret = smu_v11_0_set_single_dpm_table(smu,
-						     SMU_FCLK,
-						     dpm_table);
+		ret = smu_v11_0_set_single_dpm_table(smu, SMU_FCLK, dpm_table);
 		if (ret)
 			return ret;
 		dpm_table->is_fine_grained =
 			!driver_ppt->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete;
 	} else {
 		dpm_table->count = 1;
-		dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.fclk / 100;
+		dpm_table->dpm_levels[0].value =
+			smu->smu_table.boot_values.fclk / 100;
 		dpm_table->dpm_levels[0].enabled = true;
 		dpm_table->min = dpm_table->dpm_levels[0].value;
 		dpm_table->max = dpm_table->dpm_levels[0].value;
@@ -485,23 +490,26 @@ static int arcturus_append_powerplay_table(struct smu_context *smu)
 	struct atom_smc_dpm_info_v4_6 *smc_dpm_table;
 	int index, ret;
 
-	index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
-					   smc_dpm_info);
+	index = get_index_into_master_table(
+		atom_master_list_of_data_tables_v2_1, smc_dpm_info);
 
 	ret = smu_get_atom_data_table(smu, index, NULL, NULL, NULL,
 				      (uint8_t **)&smc_dpm_table);
 	if (ret)
 		return ret;
 
-	dev_info(smu->adev->dev, "smc_dpm_info table revision(format.content): %d.%d\n",
-			smc_dpm_table->table_header.format_revision,
-			smc_dpm_table->table_header.content_revision);
+	dev_info(smu->adev->dev,
+		 "smc_dpm_info table revision(format.content): %d.%d\n",
+		 smc_dpm_table->table_header.format_revision,
+		 smc_dpm_table->table_header.content_revision);
 
 	if ((smc_dpm_table->table_header.format_revision == 4) &&
 	    (smc_dpm_table->table_header.content_revision == 6))
 		memcpy(&smc_pptable->MaxVoltageStepGfx,
 		       &smc_dpm_table->maxvoltagestepgfx,
-		       sizeof(*smc_dpm_table) - offsetof(struct atom_smc_dpm_info_v4_6, maxvoltagestepgfx));
+		       sizeof(*smc_dpm_table) -
+			       offsetof(struct atom_smc_dpm_info_v4_6,
+					maxvoltagestepgfx));
 
 	return 0;
 }
@@ -544,16 +552,14 @@ static int arcturus_run_btc(struct smu_context *smu)
 
 static int arcturus_populate_umd_state_clk(struct smu_context *smu)
 {
-	struct smu_11_0_dpm_context *dpm_context =
-				smu->smu_dpm.dpm_context;
+	struct smu_11_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
 	struct smu_11_0_dpm_table *gfx_table =
-				&dpm_context->dpm_tables.gfx_table;
+		&dpm_context->dpm_tables.gfx_table;
 	struct smu_11_0_dpm_table *mem_table =
-				&dpm_context->dpm_tables.uclk_table;
+		&dpm_context->dpm_tables.uclk_table;
 	struct smu_11_0_dpm_table *soc_table =
-				&dpm_context->dpm_tables.soc_table;
-	struct smu_umd_pstate_table *pstate_table =
-				&smu->pstate_table;
+		&dpm_context->dpm_tables.soc_table;
+	struct smu_umd_pstate_table *pstate_table = &smu->pstate_table;
 
 	pstate_table->gfxclk_pstate.min = gfx_table->min;
 	pstate_table->gfxclk_pstate.peak = gfx_table->max;
@@ -568,11 +574,14 @@ static int arcturus_populate_umd_state_clk(struct smu_context *smu)
 	    mem_table->count > ARCTURUS_UMD_PSTATE_MCLK_LEVEL &&
 	    soc_table->count > ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL) {
 		pstate_table->gfxclk_pstate.standard =
-			gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL].value;
+			gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL]
+				.value;
 		pstate_table->uclk_pstate.standard =
-			mem_table->dpm_levels[ARCTURUS_UMD_PSTATE_MCLK_LEVEL].value;
+			mem_table->dpm_levels[ARCTURUS_UMD_PSTATE_MCLK_LEVEL]
+				.value;
 		pstate_table->socclk_pstate.standard =
-			soc_table->dpm_levels[ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL].value;
+			soc_table->dpm_levels[ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL]
+				.value;
 	} else {
 		pstate_table->gfxclk_pstate.standard =
 			pstate_table->gfxclk_pstate.min;
@@ -586,12 +595,13 @@ static int arcturus_populate_umd_state_clk(struct smu_context *smu)
 }
 
 static int arcturus_get_clk_table(struct smu_context *smu,
-			struct pp_clock_levels_with_latency *clocks,
-			struct smu_11_0_dpm_table *dpm_table)
+				  struct pp_clock_levels_with_latency *clocks,
+				  struct smu_11_0_dpm_table *dpm_table)
 {
 	int i, count;
 
-	count = (dpm_table->count > MAX_NUM_CLOCKS) ? MAX_NUM_CLOCKS : dpm_table->count;
+	count = (dpm_table->count > MAX_NUM_CLOCKS) ? MAX_NUM_CLOCKS :
+						      dpm_table->count;
 	clocks->num_levels = count;
 
 	for (i = 0; i < count; i++) {
@@ -603,8 +613,7 @@ static int arcturus_get_clk_table(struct smu_context *smu,
 	return 0;
 }
 
-static int arcturus_freqs_in_same_level(int32_t frequency1,
-					int32_t frequency2)
+static int arcturus_freqs_in_same_level(int32_t frequency1, int32_t frequency2)
 {
 	return (abs(frequency1 - frequency2) <= EPSILON);
 }
@@ -613,21 +622,20 @@ static int arcturus_get_smu_metrics_data(struct smu_context *smu,
 					 MetricsMember_t member,
 					 uint32_t *value)
 {
-	struct smu_table_context *smu_table= &smu->smu_table;
+	struct smu_table_context *smu_table = &smu->smu_table;
 	SmuMetrics_t *metrics = (SmuMetrics_t *)smu_table->metrics_table;
 	int ret = 0;
 
 	mutex_lock(&smu->metrics_lock);
 
 	if (!smu_table->metrics_time ||
-	     time_after(jiffies, smu_table->metrics_time + msecs_to_jiffies(1))) {
-		ret = smu_update_table(smu,
-				       SMU_TABLE_SMU_METRICS,
-				       0,
-				       smu_table->metrics_table,
-				       false);
+	    time_after(jiffies,
+		       smu_table->metrics_time + msecs_to_jiffies(1))) {
+		ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0,
+				       smu_table->metrics_table, false);
 		if (ret) {
-			dev_info(smu->adev->dev, "Failed to export SMU metrics table!\n");
+			dev_info(smu->adev->dev,
+				 "Failed to export SMU metrics table!\n");
 			mutex_unlock(&smu->metrics_lock);
 			return ret;
 		}
@@ -682,27 +690,27 @@ static int arcturus_get_smu_metrics_data(struct smu_context *smu,
 		break;
 	case METRICS_TEMPERATURE_EDGE:
 		*value = metrics->TemperatureEdge *
-			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+			 SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
 		break;
 	case METRICS_TEMPERATURE_HOTSPOT:
 		*value = metrics->TemperatureHotspot *
-			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+			 SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
 		break;
 	case METRICS_TEMPERATURE_MEM:
 		*value = metrics->TemperatureHBM *
-			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+			 SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
 		break;
 	case METRICS_TEMPERATURE_VRGFX:
 		*value = metrics->TemperatureVrGfx *
-			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+			 SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
 		break;
 	case METRICS_TEMPERATURE_VRSOC:
 		*value = metrics->TemperatureVrSoc *
-			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+			 SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
 		break;
 	case METRICS_TEMPERATURE_VRMEM:
 		*value = metrics->TemperatureVrMem *
-			SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+			 SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
 		break;
 	case METRICS_THROTTLER_STATUS:
 		*value = metrics->ThrottlerStatus;
@@ -721,8 +729,8 @@ static int arcturus_get_smu_metrics_data(struct smu_context *smu,
 }
 
 static int arcturus_get_current_clk_freq_by_table(struct smu_context *smu,
-				       enum smu_clk_type clk_type,
-				       uint32_t *value)
+						  enum smu_clk_type clk_type,
+						  uint32_t *value)
 {
 	MetricsMember_t member_type;
 	int clk_id = 0;
@@ -778,13 +786,11 @@ static int arcturus_get_current_clk_freq_by_table(struct smu_context *smu,
 		return -EINVAL;
 	}
 
-	return arcturus_get_smu_metrics_data(smu,
-					     member_type,
-					     value);
+	return arcturus_get_smu_metrics_data(smu, member_type, value);
 }
 
 static int arcturus_print_clk_levels(struct smu_context *smu,
-			enum smu_clk_type type, char *buf)
+				     enum smu_clk_type type, char *buf)
 {
 	int i, now, size = 0;
 	int ret = 0;
@@ -800,16 +806,19 @@ static int arcturus_print_clk_levels(struct smu_context *smu,
 
 	switch (type) {
 	case SMU_SCLK:
-		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_GFXCLK, &now);
+		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_GFXCLK,
+							     &now);
 		if (ret) {
-			dev_err(smu->adev->dev, "Attempt to get current gfx clk Failed!");
+			dev_err(smu->adev->dev,
+				"Attempt to get current gfx clk Failed!");
 			return ret;
 		}
 
 		single_dpm_table = &(dpm_context->dpm_tables.gfx_table);
 		ret = arcturus_get_clk_table(smu, &clocks, single_dpm_table);
 		if (ret) {
-			dev_err(smu->adev->dev, "Attempt to get gfx clk levels Failed!");
+			dev_err(smu->adev->dev,
+				"Attempt to get gfx clk levels Failed!");
 			return ret;
 		}
 
@@ -818,81 +827,110 @@ static int arcturus_print_clk_levels(struct smu_context *smu,
 		 * And it's safe to assume that is always the current clock.
 		 */
 		for (i = 0; i < clocks.num_levels; i++)
-			size += sprintf(buf + size, "%d: %uMhz %s\n", i,
-					clocks.data[i].clocks_in_khz / 1000,
-					(clocks.num_levels == 1) ? "*" :
+			size += sprintf(
+				buf + size, "%d: %uMhz %s\n", i,
+				clocks.data[i].clocks_in_khz / 1000,
+				(clocks.num_levels == 1) ?
+					"*" :
 					(arcturus_freqs_in_same_level(
-					clocks.data[i].clocks_in_khz / 1000,
-					now) ? "*" : ""));
+						 clocks.data[i].clocks_in_khz /
+							 1000,
+						 now) ?
+						 "*" :
+						 ""));
 		break;
 
 	case SMU_MCLK:
-		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_UCLK, &now);
+		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_UCLK,
+							     &now);
 		if (ret) {
-			dev_err(smu->adev->dev, "Attempt to get current mclk Failed!");
+			dev_err(smu->adev->dev,
+				"Attempt to get current mclk Failed!");
 			return ret;
 		}
 
 		single_dpm_table = &(dpm_context->dpm_tables.uclk_table);
 		ret = arcturus_get_clk_table(smu, &clocks, single_dpm_table);
 		if (ret) {
-			dev_err(smu->adev->dev, "Attempt to get memory clk levels Failed!");
+			dev_err(smu->adev->dev,
+				"Attempt to get memory clk levels Failed!");
 			return ret;
 		}
 
 		for (i = 0; i < clocks.num_levels; i++)
-			size += sprintf(buf + size, "%d: %uMhz %s\n",
-				i, clocks.data[i].clocks_in_khz / 1000,
-				(clocks.num_levels == 1) ? "*" :
-				(arcturus_freqs_in_same_level(
+			size += sprintf(
+				buf + size, "%d: %uMhz %s\n", i,
 				clocks.data[i].clocks_in_khz / 1000,
-				now) ? "*" : ""));
+				(clocks.num_levels == 1) ?
+					"*" :
+					(arcturus_freqs_in_same_level(
+						 clocks.data[i].clocks_in_khz /
+							 1000,
+						 now) ?
+						 "*" :
+						 ""));
 		break;
 
 	case SMU_SOCCLK:
-		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_SOCCLK, &now);
+		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_SOCCLK,
+							     &now);
 		if (ret) {
-			dev_err(smu->adev->dev, "Attempt to get current socclk Failed!");
+			dev_err(smu->adev->dev,
+				"Attempt to get current socclk Failed!");
 			return ret;
 		}
 
 		single_dpm_table = &(dpm_context->dpm_tables.soc_table);
 		ret = arcturus_get_clk_table(smu, &clocks, single_dpm_table);
 		if (ret) {
-			dev_err(smu->adev->dev, "Attempt to get socclk levels Failed!");
+			dev_err(smu->adev->dev,
+				"Attempt to get socclk levels Failed!");
 			return ret;
 		}
 
 		for (i = 0; i < clocks.num_levels; i++)
-			size += sprintf(buf + size, "%d: %uMhz %s\n",
-				i, clocks.data[i].clocks_in_khz / 1000,
-				(clocks.num_levels == 1) ? "*" :
-				(arcturus_freqs_in_same_level(
+			size += sprintf(
+				buf + size, "%d: %uMhz %s\n", i,
 				clocks.data[i].clocks_in_khz / 1000,
-				now) ? "*" : ""));
+				(clocks.num_levels == 1) ?
+					"*" :
+					(arcturus_freqs_in_same_level(
+						 clocks.data[i].clocks_in_khz /
+							 1000,
+						 now) ?
+						 "*" :
+						 ""));
 		break;
 
 	case SMU_FCLK:
-		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_FCLK, &now);
+		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_FCLK,
+							     &now);
 		if (ret) {
-			dev_err(smu->adev->dev, "Attempt to get current fclk Failed!");
+			dev_err(smu->adev->dev,
+				"Attempt to get current fclk Failed!");
 			return ret;
 		}
 
 		single_dpm_table = &(dpm_context->dpm_tables.fclk_table);
 		ret = arcturus_get_clk_table(smu, &clocks, single_dpm_table);
 		if (ret) {
-			dev_err(smu->adev->dev, "Attempt to get fclk levels Failed!");
+			dev_err(smu->adev->dev,
+				"Attempt to get fclk levels Failed!");
 			return ret;
 		}
 
 		for (i = 0; i < single_dpm_table->count; i++)
-			size += sprintf(buf + size, "%d: %uMhz %s\n",
-				i, single_dpm_table->dpm_levels[i].value,
-				(clocks.num_levels == 1) ? "*" :
-				(arcturus_freqs_in_same_level(
-				clocks.data[i].clocks_in_khz / 1000,
-				now) ? "*" : ""));
+			size += sprintf(
+				buf + size, "%d: %uMhz %s\n", i,
+				single_dpm_table->dpm_levels[i].value,
+				(clocks.num_levels == 1) ?
+					"*" :
+					(arcturus_freqs_in_same_level(
+						 clocks.data[i].clocks_in_khz /
+							 1000,
+						 now) ?
+						 "*" :
+						 ""));
 		break;
 
 	default:
@@ -902,40 +940,42 @@ static int arcturus_print_clk_levels(struct smu_context *smu,
 	return size;
 }
 
-static int arcturus_upload_dpm_level(struct smu_context *smu,
-				     bool max,
-				     uint32_t feature_mask,
-				     uint32_t level)
+static int arcturus_upload_dpm_level(struct smu_context *smu, bool max,
+				     uint32_t feature_mask, uint32_t level)
 {
-	struct smu_11_0_dpm_context *dpm_context =
-			smu->smu_dpm.dpm_context;
+	struct smu_11_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
 	uint32_t freq;
 	int ret = 0;
 
 	if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_GFXCLK_BIT) &&
 	    (feature_mask & FEATURE_DPM_GFXCLK_MASK)) {
 		freq = dpm_context->dpm_tables.gfx_table.dpm_levels[level].value;
-		ret = smu_send_smc_msg_with_param(smu,
-			(max ? SMU_MSG_SetSoftMaxByFreq : SMU_MSG_SetSoftMinByFreq),
-			(PPCLK_GFXCLK << 16) | (freq & 0xffff),
-			NULL);
+		ret = smu_send_smc_msg_with_param(
+			smu,
+			(max ? SMU_MSG_SetSoftMaxByFreq :
+			       SMU_MSG_SetSoftMinByFreq),
+			(PPCLK_GFXCLK << 16) | (freq & 0xffff), NULL);
 		if (ret) {
-			dev_err(smu->adev->dev, "Failed to set soft %s gfxclk !\n",
-						max ? "max" : "min");
+			dev_err(smu->adev->dev,
+				"Failed to set soft %s gfxclk !\n",
+				max ? "max" : "min");
 			return ret;
 		}
 	}
 
 	if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT) &&
 	    (feature_mask & FEATURE_DPM_UCLK_MASK)) {
-		freq = dpm_context->dpm_tables.uclk_table.dpm_levels[level].value;
-		ret = smu_send_smc_msg_with_param(smu,
-			(max ? SMU_MSG_SetSoftMaxByFreq : SMU_MSG_SetSoftMinByFreq),
-			(PPCLK_UCLK << 16) | (freq & 0xffff),
-			NULL);
+		freq = dpm_context->dpm_tables.uclk_table.dpm_levels[level]
+			       .value;
+		ret = smu_send_smc_msg_with_param(
+			smu,
+			(max ? SMU_MSG_SetSoftMaxByFreq :
+			       SMU_MSG_SetSoftMinByFreq),
+			(PPCLK_UCLK << 16) | (freq & 0xffff), NULL);
 		if (ret) {
-			dev_err(smu->adev->dev, "Failed to set soft %s memclk !\n",
-						max ? "max" : "min");
+			dev_err(smu->adev->dev,
+				"Failed to set soft %s memclk !\n",
+				max ? "max" : "min");
 			return ret;
 		}
 	}
@@ -943,13 +983,15 @@ static int arcturus_upload_dpm_level(struct smu_context *smu,
 	if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT) &&
 	    (feature_mask & FEATURE_DPM_SOCCLK_MASK)) {
 		freq = dpm_context->dpm_tables.soc_table.dpm_levels[level].value;
-		ret = smu_send_smc_msg_with_param(smu,
-			(max ? SMU_MSG_SetSoftMaxByFreq : SMU_MSG_SetSoftMinByFreq),
-			(PPCLK_SOCCLK << 16) | (freq & 0xffff),
-			NULL);
+		ret = smu_send_smc_msg_with_param(
+			smu,
+			(max ? SMU_MSG_SetSoftMaxByFreq :
+			       SMU_MSG_SetSoftMinByFreq),
+			(PPCLK_SOCCLK << 16) | (freq & 0xffff), NULL);
 		if (ret) {
-			dev_err(smu->adev->dev, "Failed to set soft %s socclk !\n",
-						max ? "max" : "min");
+			dev_err(smu->adev->dev,
+				"Failed to set soft %s socclk !\n",
+				max ? "max" : "min");
 			return ret;
 		}
 	}
@@ -958,7 +1000,7 @@ static int arcturus_upload_dpm_level(struct smu_context *smu,
 }
 
 static int arcturus_force_clk_levels(struct smu_context *smu,
-			enum smu_clk_type type, uint32_t mask)
+				     enum smu_clk_type type, uint32_t mask)
 {
 	struct smu_11_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
 	struct smu_11_0_dpm_table *single_dpm_table = NULL;
@@ -973,8 +1015,9 @@ static int arcturus_force_clk_levels(struct smu_context *smu,
 	}
 
 	if (smu_version >= 0x361200) {
-		dev_err(smu->adev->dev, "Forcing clock level is not supported with "
-		       "54.18 and onwards SMU firmwares\n");
+		dev_err(smu->adev->dev,
+			"Forcing clock level is not supported with "
+			"54.18 and onwards SMU firmwares\n");
 		return -EOPNOTSUPP;
 	}
 
@@ -985,27 +1028,26 @@ static int arcturus_force_clk_levels(struct smu_context *smu,
 	case SMU_SCLK:
 		single_dpm_table = &(dpm_context->dpm_tables.gfx_table);
 		if (soft_max_level >= single_dpm_table->count) {
-			dev_err(smu->adev->dev, "Clock level specified %d is over max allowed %d\n",
-					soft_max_level, single_dpm_table->count - 1);
+			dev_err(smu->adev->dev,
+				"Clock level specified %d is over max allowed %d\n",
+				soft_max_level, single_dpm_table->count - 1);
 			ret = -EINVAL;
 			break;
 		}
 
-		ret = arcturus_upload_dpm_level(smu,
-						false,
-						FEATURE_DPM_GFXCLK_MASK,
-						soft_min_level);
+		ret = arcturus_upload_dpm_level(
+			smu, false, FEATURE_DPM_GFXCLK_MASK, soft_min_level);
 		if (ret) {
-			dev_err(smu->adev->dev, "Failed to upload boot level to lowest!\n");
+			dev_err(smu->adev->dev,
+				"Failed to upload boot level to lowest!\n");
 			break;
 		}
 
-		ret = arcturus_upload_dpm_level(smu,
-						true,
-						FEATURE_DPM_GFXCLK_MASK,
-						soft_max_level);
+		ret = arcturus_upload_dpm_level(
+			smu, true, FEATURE_DPM_GFXCLK_MASK, soft_max_level);
 		if (ret)
-			dev_err(smu->adev->dev, "Failed to upload dpm max level to highest!\n");
+			dev_err(smu->adev->dev,
+				"Failed to upload dpm max level to highest!\n");
 
 		break;
 
@@ -1026,31 +1068,34 @@ static int arcturus_force_clk_levels(struct smu_context *smu,
 	return ret;
 }
 
-static int arcturus_get_thermal_temperature_range(struct smu_context *smu,
-						struct smu_temperature_range *range)
+static int
+arcturus_get_thermal_temperature_range(struct smu_context *smu,
+				       struct smu_temperature_range *range)
 {
 	struct smu_table_context *table_context = &smu->smu_table;
 	struct smu_11_0_powerplay_table *powerplay_table =
-				table_context->power_play_table;
+		table_context->power_play_table;
 	PPTable_t *pptable = smu->smu_table.driver_pptable;
 
 	if (!range)
 		return -EINVAL;
 
-	memcpy(range, &smu11_thermal_policy[0], sizeof(struct smu_temperature_range));
+	memcpy(range, &smu11_thermal_policy[0],
+	       sizeof(struct smu_temperature_range));
 
-	range->max = pptable->TedgeLimit *
-		SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+	range->max =
+		pptable->TedgeLimit * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
 	range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE) *
+				    SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+	range->hotspot_crit_max =
+		pptable->ThotspotLimit * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+	range->hotspot_emergency_max =
+		(pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) *
 		SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	range->hotspot_crit_max = pptable->ThotspotLimit *
-		SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) *
-		SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	range->mem_crit_max = pptable->TmemLimit *
-		SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	range->mem_emergency_max = (pptable->TmemLimit + CTF_OFFSET_MEM)*
-		SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+	range->mem_crit_max =
+		pptable->TmemLimit * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+	range->mem_emergency_max = (pptable->TmemLimit + CTF_OFFSET_MEM) *
+				   SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
 	range->software_shutdown_temp = powerplay_table->software_shutdown_temp;
 
 	return 0;
@@ -1067,17 +1112,16 @@ static int arcturus_get_current_activity_percent(struct smu_context *smu,
 
 	switch (sensor) {
 	case AMDGPU_PP_SENSOR_GPU_LOAD:
-		ret = arcturus_get_smu_metrics_data(smu,
-						    METRICS_AVERAGE_GFXACTIVITY,
-						    value);
+		ret = arcturus_get_smu_metrics_data(
+			smu, METRICS_AVERAGE_GFXACTIVITY, value);
 		break;
 	case AMDGPU_PP_SENSOR_MEM_LOAD:
-		ret = arcturus_get_smu_metrics_data(smu,
-						    METRICS_AVERAGE_MEMACTIVITY,
-						    value);
+		ret = arcturus_get_smu_metrics_data(
+			smu, METRICS_AVERAGE_MEMACTIVITY, value);
 		break;
 	default:
-		dev_err(smu->adev->dev, "Invalid sensor for retrieving clock activity\n");
+		dev_err(smu->adev->dev,
+			"Invalid sensor for retrieving clock activity\n");
 		return -EINVAL;
 	}
 
@@ -1089,8 +1133,7 @@ static int arcturus_get_gpu_power(struct smu_context *smu, uint32_t *value)
 	if (!value)
 		return -EINVAL;
 
-	return arcturus_get_smu_metrics_data(smu,
-					     METRICS_AVERAGE_SOCKETPOWER,
+	return arcturus_get_smu_metrics_data(smu, METRICS_AVERAGE_SOCKETPOWER,
 					     value);
 }
 
@@ -1105,19 +1148,16 @@ static int arcturus_thermal_get_temperature(struct smu_context *smu,
 
 	switch (sensor) {
 	case AMDGPU_PP_SENSOR_HOTSPOT_TEMP:
-		ret = arcturus_get_smu_metrics_data(smu,
-						    METRICS_TEMPERATURE_HOTSPOT,
-						    value);
+		ret = arcturus_get_smu_metrics_data(
+			smu, METRICS_TEMPERATURE_HOTSPOT, value);
 		break;
 	case AMDGPU_PP_SENSOR_EDGE_TEMP:
-		ret = arcturus_get_smu_metrics_data(smu,
-						    METRICS_TEMPERATURE_EDGE,
-						    value);
+		ret = arcturus_get_smu_metrics_data(
+			smu, METRICS_TEMPERATURE_EDGE, value);
 		break;
 	case AMDGPU_PP_SENSOR_MEM_TEMP:
-		ret = arcturus_get_smu_metrics_data(smu,
-						    METRICS_TEMPERATURE_MEM,
-						    value);
+		ret = arcturus_get_smu_metrics_data(
+			smu, METRICS_TEMPERATURE_MEM, value);
 		break;
 	default:
 		dev_err(smu->adev->dev, "Invalid sensor for retrieving temp\n");
@@ -1128,8 +1168,8 @@ static int arcturus_thermal_get_temperature(struct smu_context *smu,
 }
 
 static int arcturus_read_sensor(struct smu_context *smu,
-				enum amd_pp_sensors sensor,
-				void *data, uint32_t *size)
+				enum amd_pp_sensors sensor, void *data,
+				uint32_t *size)
 {
 	struct smu_table_context *table_context = &smu->smu_table;
 	PPTable_t *pptable = table_context->driver_pptable;
@@ -1149,9 +1189,8 @@ static int arcturus_read_sensor(struct smu_context *smu,
 		break;
 	case AMDGPU_PP_SENSOR_MEM_LOAD:
 	case AMDGPU_PP_SENSOR_GPU_LOAD:
-		ret = arcturus_get_current_activity_percent(smu,
-							    sensor,
-						(uint32_t *)data);
+		ret = arcturus_get_current_activity_percent(smu, sensor,
+							    (uint32_t *)data);
 		*size = 4;
 		break;
 	case AMDGPU_PP_SENSOR_GPU_POWER:
@@ -1162,17 +1201,19 @@ static int arcturus_read_sensor(struct smu_context *smu,
 	case AMDGPU_PP_SENSOR_EDGE_TEMP:
 	case AMDGPU_PP_SENSOR_MEM_TEMP:
 		ret = arcturus_thermal_get_temperature(smu, sensor,
-						(uint32_t *)data);
+						       (uint32_t *)data);
 		*size = 4;
 		break;
 	case AMDGPU_PP_SENSOR_GFX_MCLK:
-		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_UCLK, (uint32_t *)data);
+		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_UCLK,
+							     (uint32_t *)data);
 		/* the output clock frequency in 10K unit */
 		*(uint32_t *)data *= 100;
 		*size = 4;
 		break;
 	case AMDGPU_PP_SENSOR_GFX_SCLK:
-		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t *)data);
+		ret = arcturus_get_current_clk_freq_by_table(smu, SMU_GFXCLK,
+							     (uint32_t *)data);
 		*(uint32_t *)data *= 100;
 		*size = 4;
 		break;
@@ -1189,15 +1230,12 @@ static int arcturus_read_sensor(struct smu_context *smu,
 	return ret;
 }
 
-static int arcturus_get_fan_speed_rpm(struct smu_context *smu,
-				      uint32_t *speed)
+static int arcturus_get_fan_speed_rpm(struct smu_context *smu, uint32_t *speed)
 {
 	if (!speed)
 		return -EINVAL;
 
-	return arcturus_get_smu_metrics_data(smu,
-					     METRICS_CURR_FANSPEED,
-					     speed);
+	return arcturus_get_smu_metrics_data(smu, METRICS_CURR_FANSPEED, speed);
 }
 
 static int arcturus_get_fan_speed_percent(struct smu_context *smu,
@@ -1223,25 +1261,30 @@ static int arcturus_get_fan_speed_percent(struct smu_context *smu,
 static int arcturus_get_power_limit(struct smu_context *smu)
 {
 	struct smu_11_0_powerplay_table *powerplay_table =
-		(struct smu_11_0_powerplay_table *)smu->smu_table.power_play_table;
+		(struct smu_11_0_powerplay_table *)
+			smu->smu_table.power_play_table;
 	PPTable_t *pptable = smu->smu_table.driver_pptable;
 	uint32_t power_limit, od_percent;
 
 	if (smu_v11_0_get_current_power_limit(smu, &power_limit)) {
 		/* the last hope to figure out the ppt limit */
 		if (!pptable) {
-			dev_err(smu->adev->dev, "Cannot get PPT limit due to pptable missing!");
+			dev_err(smu->adev->dev,
+				"Cannot get PPT limit due to pptable missing!");
 			return -EINVAL;
 		}
-		power_limit =
-			pptable->SocketPowerLimitAc[PPT_THROTTLER_PPT0];
+		power_limit = pptable->SocketPowerLimitAc[PPT_THROTTLER_PPT0];
 	}
 	smu->current_power_limit = power_limit;
 
 	if (smu->od_enabled) {
-		od_percent = le32_to_cpu(powerplay_table->overdrive_table.max[SMU_11_0_ODSETTING_POWERPERCENTAGE]);
+		od_percent = le32_to_cpu(
+			powerplay_table->overdrive_table
+				.max[SMU_11_0_ODSETTING_POWERPERCENTAGE]);
 
-		dev_dbg(smu->adev->dev, "ODSETTING_POWERPERCENTAGE: %d (default: %d)\n", od_percent, power_limit);
+		dev_dbg(smu->adev->dev,
+			"ODSETTING_POWERPERCENTAGE: %d (default: %d)\n",
+			od_percent, power_limit);
 
 		power_limit *= (100 + od_percent);
 		power_limit /= 100;
@@ -1251,30 +1294,27 @@ static int arcturus_get_power_limit(struct smu_context *smu)
 	return 0;
 }
 
-static int arcturus_get_power_profile_mode(struct smu_context *smu,
-					   char *buf)
+static int arcturus_get_power_profile_mode(struct smu_context *smu, char *buf)
 {
 	DpmActivityMonitorCoeffInt_t activity_monitor;
-	static const char *profile_name[] = {
-					"BOOTUP_DEFAULT",
-					"3D_FULL_SCREEN",
-					"POWER_SAVING",
-					"VIDEO",
-					"VR",
-					"COMPUTE",
-					"CUSTOM"};
-	static const char *title[] = {
-			"PROFILE_INDEX(NAME)",
-			"CLOCK_TYPE(NAME)",
-			"FPS",
-			"UseRlcBusy",
-			"MinActiveFreqType",
-			"MinActiveFreq",
-			"BoosterFreqType",
-			"BoosterFreq",
-			"PD_Data_limit_c",
-			"PD_Data_error_coeff",
-			"PD_Data_error_rate_coeff"};
+	static const char *profile_name[] = { "BOOTUP_DEFAULT",
+					      "3D_FULL_SCREEN",
+					      "POWER_SAVING",
+					      "VIDEO",
+					      "VR",
+					      "COMPUTE",
+					      "CUSTOM" };
+	static const char *title[] = { "PROFILE_INDEX(NAME)",
+				       "CLOCK_TYPE(NAME)",
+				       "FPS",
+				       "UseRlcBusy",
+				       "MinActiveFreqType",
+				       "MinActiveFreq",
+				       "BoosterFreqType",
+				       "BoosterFreq",
+				       "PD_Data_limit_c",
+				       "PD_Data_error_coeff",
+				       "PD_Data_error_rate_coeff" };
 	uint32_t i, size = 0;
 	int16_t workload_type = 0;
 	int result = 0;
@@ -1288,12 +1328,13 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu,
 		return result;
 
 	if (smu_version >= 0x360d00)
-		size += sprintf(buf + size, "%16s %s %s %s %s %s %s %s %s %s %s\n",
-			title[0], title[1], title[2], title[3], title[4], title[5],
-			title[6], title[7], title[8], title[9], title[10]);
+		size += sprintf(buf + size,
+				"%16s %s %s %s %s %s %s %s %s %s %s\n",
+				title[0], title[1], title[2], title[3],
+				title[4], title[5], title[6], title[7],
+				title[8], title[9], title[10]);
 	else
-		size += sprintf(buf + size, "%16s\n",
-			title[0]);
+		size += sprintf(buf + size, "%16s\n", title[0]);
 
 	for (i = 0; i <= PP_SMC_POWER_PROFILE_CUSTOM; i++) {
 		/*
@@ -1305,26 +1346,26 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu,
 			continue;
 
 		if (smu_version >= 0x360d00) {
-			result = smu_update_table(smu,
-						  SMU_TABLE_ACTIVITY_MONITOR_COEFF,
-						  workload_type,
-						  (void *)(&activity_monitor),
-						  false);
+			result = smu_update_table(
+				smu, SMU_TABLE_ACTIVITY_MONITOR_COEFF,
+				workload_type, (void *)(&activity_monitor),
+				false);
 			if (result) {
-				dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__);
+				dev_err(smu->adev->dev,
+					"[%s] Failed to get activity monitor!",
+					__func__);
 				return result;
 			}
 		}
 
-		size += sprintf(buf + size, "%2d %14s%s\n",
-			i, profile_name[i], (i == smu->power_profile_mode) ? "*" : " ");
+		size += sprintf(buf + size, "%2d %14s%s\n", i, profile_name[i],
+				(i == smu->power_profile_mode) ? "*" : " ");
 
 		if (smu_version >= 0x360d00) {
-			size += sprintf(buf + size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",
-				" ",
-				0,
-				"GFXCLK",
-				activity_monitor.Gfx_FPS,
+			size += sprintf(
+				buf + size,
+				"%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",
+				" ", 0, "GFXCLK", activity_monitor.Gfx_FPS,
 				activity_monitor.Gfx_UseRlcBusy,
 				activity_monitor.Gfx_MinActiveFreqType,
 				activity_monitor.Gfx_MinActiveFreq,
@@ -1334,11 +1375,10 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu,
 				activity_monitor.Gfx_PD_Data_error_coeff,
 				activity_monitor.Gfx_PD_Data_error_rate_coeff);
 
-			size += sprintf(buf + size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",
-				" ",
-				1,
-				"UCLK",
-				activity_monitor.Mem_FPS,
+			size += sprintf(
+				buf + size,
+				"%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",
+				" ", 1, "UCLK", activity_monitor.Mem_FPS,
 				activity_monitor.Mem_UseRlcBusy,
 				activity_monitor.Mem_MinActiveFreqType,
 				activity_monitor.Mem_MinActiveFreq,
@@ -1353,8 +1393,7 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu,
 	return size;
 }
 
-static int arcturus_set_power_profile_mode(struct smu_context *smu,
-					   long *input,
+static int arcturus_set_power_profile_mode(struct smu_context *smu, long *input,
 					   uint32_t size)
 {
 	DpmActivityMonitorCoeffInt_t activity_monitor;
@@ -1364,7 +1403,8 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
 	uint32_t smu_version;
 
 	if (profile_mode > PP_SMC_POWER_PROFILE_CUSTOM) {
-		dev_err(smu->adev->dev, "Invalid power profile mode %d\n", profile_mode);
+		dev_err(smu->adev->dev, "Invalid power profile mode %d\n",
+			profile_mode);
 		return -EINVAL;
 	}
 
@@ -1373,14 +1413,14 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
 		return ret;
 
 	if ((profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) &&
-	     (smu_version >=0x360d00)) {
-		ret = smu_update_table(smu,
-				       SMU_TABLE_ACTIVITY_MONITOR_COEFF,
+	    (smu_version >= 0x360d00)) {
+		ret = smu_update_table(smu, SMU_TABLE_ACTIVITY_MONITOR_COEFF,
 				       WORKLOAD_PPLIB_CUSTOM_BIT,
-				       (void *)(&activity_monitor),
-				       false);
+				       (void *)(&activity_monitor), false);
 		if (ret) {
-			dev_err(smu->adev->dev, "[%s] Failed to get activity monitor!", __func__);
+			dev_err(smu->adev->dev,
+				"[%s] Failed to get activity monitor!",
+				__func__);
 			return ret;
 		}
 
@@ -1394,7 +1434,8 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
 			activity_monitor.Gfx_BoosterFreq = input[6];
 			activity_monitor.Gfx_PD_Data_limit_c = input[7];
 			activity_monitor.Gfx_PD_Data_error_coeff = input[8];
-			activity_monitor.Gfx_PD_Data_error_rate_coeff = input[9];
+			activity_monitor.Gfx_PD_Data_error_rate_coeff =
+				input[9];
 			break;
 		case 1: /* Uclk */
 			activity_monitor.Mem_FPS = input[1];
@@ -1405,17 +1446,18 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
 			activity_monitor.Mem_BoosterFreq = input[6];
 			activity_monitor.Mem_PD_Data_limit_c = input[7];
 			activity_monitor.Mem_PD_Data_error_coeff = input[8];
-			activity_monitor.Mem_PD_Data_error_rate_coeff = input[9];
+			activity_monitor.Mem_PD_Data_error_rate_coeff =
+				input[9];
 			break;
 		}
 
-		ret = smu_update_table(smu,
-				       SMU_TABLE_ACTIVITY_MONITOR_COEFF,
+		ret = smu_update_table(smu, SMU_TABLE_ACTIVITY_MONITOR_COEFF,
 				       WORKLOAD_PPLIB_CUSTOM_BIT,
-				       (void *)(&activity_monitor),
-				       true);
+				       (void *)(&activity_monitor), true);
 		if (ret) {
-			dev_err(smu->adev->dev, "[%s] Failed to set activity monitor!", __func__);
+			dev_err(smu->adev->dev,
+				"[%s] Failed to set activity monitor!",
+				__func__);
 			return ret;
 		}
 	}
@@ -1426,16 +1468,17 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
 	 */
 	workload_type = smu_workload_get_type(smu, profile_mode);
 	if (workload_type < 0) {
-		dev_err(smu->adev->dev, "Unsupported power profile mode %d on arcturus\n", profile_mode);
+		dev_err(smu->adev->dev,
+			"Unsupported power profile mode %d on arcturus\n",
+			profile_mode);
 		return -EINVAL;
 	}
 
-	ret = smu_send_smc_msg_with_param(smu,
-					  SMU_MSG_SetWorkloadMask,
-					  1 << workload_type,
-					  NULL);
+	ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask,
+					  1 << workload_type, NULL);
 	if (ret) {
-		dev_err(smu->adev->dev, "Fail to set workload type %d\n", workload_type);
+		dev_err(smu->adev->dev, "Fail to set workload type %d\n",
+			workload_type);
 		return ret;
 	}
 
@@ -1464,8 +1507,9 @@ static int arcturus_set_performance_level(struct smu_context *smu,
 	case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK:
 	case AMD_DPM_FORCED_LEVEL_PROFILE_PEAK:
 		if (smu_version >= 0x361200) {
-			dev_err(smu->adev->dev, "Forcing clock level is not supported with "
-			       "54.18 and onwards SMU firmwares\n");
+			dev_err(smu->adev->dev,
+				"Forcing clock level is not supported with "
+				"54.18 and onwards SMU firmwares\n");
 			return -EOPNOTSUPP;
 		}
 		break;
@@ -1486,425 +1530,557 @@ static void arcturus_dump_pptable(struct smu_context *smu)
 
 	dev_info(smu->adev->dev, "Version = 0x%08x\n", pptable->Version);
 
-	dev_info(smu->adev->dev, "FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]);
-	dev_info(smu->adev->dev, "FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]);
+	dev_info(smu->adev->dev, "FeaturesToRun[0] = 0x%08x\n",
+		 pptable->FeaturesToRun[0]);
+	dev_info(smu->adev->dev, "FeaturesToRun[1] = 0x%08x\n",
+		 pptable->FeaturesToRun[1]);
 
 	for (i = 0; i < PPT_THROTTLER_COUNT; i++) {
-		dev_info(smu->adev->dev, "SocketPowerLimitAc[%d] = %d\n", i, pptable->SocketPowerLimitAc[i]);
-		dev_info(smu->adev->dev, "SocketPowerLimitAcTau[%d] = %d\n", i, pptable->SocketPowerLimitAcTau[i]);
+		dev_info(smu->adev->dev, "SocketPowerLimitAc[%d] = %d\n", i,
+			 pptable->SocketPowerLimitAc[i]);
+		dev_info(smu->adev->dev, "SocketPowerLimitAcTau[%d] = %d\n", i,
+			 pptable->SocketPowerLimitAcTau[i]);
 	}
 
 	dev_info(smu->adev->dev, "TdcLimitSoc = %d\n", pptable->TdcLimitSoc);
-	dev_info(smu->adev->dev, "TdcLimitSocTau = %d\n", pptable->TdcLimitSocTau);
+	dev_info(smu->adev->dev, "TdcLimitSocTau = %d\n",
+		 pptable->TdcLimitSocTau);
 	dev_info(smu->adev->dev, "TdcLimitGfx = %d\n", pptable->TdcLimitGfx);
-	dev_info(smu->adev->dev, "TdcLimitGfxTau = %d\n", pptable->TdcLimitGfxTau);
+	dev_info(smu->adev->dev, "TdcLimitGfxTau = %d\n",
+		 pptable->TdcLimitGfxTau);
 
 	dev_info(smu->adev->dev, "TedgeLimit = %d\n", pptable->TedgeLimit);
-	dev_info(smu->adev->dev, "ThotspotLimit = %d\n", pptable->ThotspotLimit);
+	dev_info(smu->adev->dev, "ThotspotLimit = %d\n",
+		 pptable->ThotspotLimit);
 	dev_info(smu->adev->dev, "TmemLimit = %d\n", pptable->TmemLimit);
 	dev_info(smu->adev->dev, "Tvr_gfxLimit = %d\n", pptable->Tvr_gfxLimit);
 	dev_info(smu->adev->dev, "Tvr_memLimit = %d\n", pptable->Tvr_memLimit);
 	dev_info(smu->adev->dev, "Tvr_socLimit = %d\n", pptable->Tvr_socLimit);
 	dev_info(smu->adev->dev, "FitLimit = %d\n", pptable->FitLimit);
 
-	dev_info(smu->adev->dev, "PpmPowerLimit = %d\n", pptable->PpmPowerLimit);
-	dev_info(smu->adev->dev, "PpmTemperatureThreshold = %d\n", pptable->PpmTemperatureThreshold);
+	dev_info(smu->adev->dev, "PpmPowerLimit = %d\n",
+		 pptable->PpmPowerLimit);
+	dev_info(smu->adev->dev, "PpmTemperatureThreshold = %d\n",
+		 pptable->PpmTemperatureThreshold);
 
-	dev_info(smu->adev->dev, "ThrottlerControlMask = %d\n", pptable->ThrottlerControlMask);
+	dev_info(smu->adev->dev, "ThrottlerControlMask = %d\n",
+		 pptable->ThrottlerControlMask);
 
-	dev_info(smu->adev->dev, "UlvVoltageOffsetGfx = %d\n", pptable->UlvVoltageOffsetGfx);
+	dev_info(smu->adev->dev, "UlvVoltageOffsetGfx = %d\n",
+		 pptable->UlvVoltageOffsetGfx);
 	dev_info(smu->adev->dev, "UlvPadding = 0x%08x\n", pptable->UlvPadding);
 
-	dev_info(smu->adev->dev, "UlvGfxclkBypass = %d\n", pptable->UlvGfxclkBypass);
-	dev_info(smu->adev->dev, "Padding234[0] = 0x%02x\n", pptable->Padding234[0]);
-	dev_info(smu->adev->dev, "Padding234[1] = 0x%02x\n", pptable->Padding234[1]);
-	dev_info(smu->adev->dev, "Padding234[2] = 0x%02x\n", pptable->Padding234[2]);
-
-	dev_info(smu->adev->dev, "MinVoltageGfx = %d\n", pptable->MinVoltageGfx);
-	dev_info(smu->adev->dev, "MinVoltageSoc = %d\n", pptable->MinVoltageSoc);
-	dev_info(smu->adev->dev, "MaxVoltageGfx = %d\n", pptable->MaxVoltageGfx);
-	dev_info(smu->adev->dev, "MaxVoltageSoc = %d\n", pptable->MaxVoltageSoc);
-
-	dev_info(smu->adev->dev, "LoadLineResistanceGfx = %d\n", pptable->LoadLineResistanceGfx);
-	dev_info(smu->adev->dev, "LoadLineResistanceSoc = %d\n", pptable->LoadLineResistanceSoc);
-
-	dev_info(smu->adev->dev, "[PPCLK_GFXCLK]\n"
-			"  .VoltageMode          = 0x%02x\n"
-			"  .SnapToDiscrete       = 0x%02x\n"
-			"  .NumDiscreteLevels    = 0x%02x\n"
-			"  .padding              = 0x%02x\n"
-			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
-			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
-			"  .SsFmin               = 0x%04x\n"
-			"  .Padding_16           = 0x%04x\n",
-			pptable->DpmDescriptor[PPCLK_GFXCLK].VoltageMode,
-			pptable->DpmDescriptor[PPCLK_GFXCLK].SnapToDiscrete,
-			pptable->DpmDescriptor[PPCLK_GFXCLK].NumDiscreteLevels,
-			pptable->DpmDescriptor[PPCLK_GFXCLK].padding,
-			pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.m,
-			pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.b,
-			pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.a,
-			pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.b,
-			pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.c,
-			pptable->DpmDescriptor[PPCLK_GFXCLK].SsFmin,
-			pptable->DpmDescriptor[PPCLK_GFXCLK].Padding16);
-
-	dev_info(smu->adev->dev, "[PPCLK_VCLK]\n"
-			"  .VoltageMode          = 0x%02x\n"
-			"  .SnapToDiscrete       = 0x%02x\n"
-			"  .NumDiscreteLevels    = 0x%02x\n"
-			"  .padding              = 0x%02x\n"
-			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
-			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
-			"  .SsFmin               = 0x%04x\n"
-			"  .Padding_16           = 0x%04x\n",
-			pptable->DpmDescriptor[PPCLK_VCLK].VoltageMode,
-			pptable->DpmDescriptor[PPCLK_VCLK].SnapToDiscrete,
-			pptable->DpmDescriptor[PPCLK_VCLK].NumDiscreteLevels,
-			pptable->DpmDescriptor[PPCLK_VCLK].padding,
-			pptable->DpmDescriptor[PPCLK_VCLK].ConversionToAvfsClk.m,
-			pptable->DpmDescriptor[PPCLK_VCLK].ConversionToAvfsClk.b,
-			pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.a,
-			pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.b,
-			pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.c,
-			pptable->DpmDescriptor[PPCLK_VCLK].SsFmin,
-			pptable->DpmDescriptor[PPCLK_VCLK].Padding16);
-
-	dev_info(smu->adev->dev, "[PPCLK_DCLK]\n"
-			"  .VoltageMode          = 0x%02x\n"
-			"  .SnapToDiscrete       = 0x%02x\n"
-			"  .NumDiscreteLevels    = 0x%02x\n"
-			"  .padding              = 0x%02x\n"
-			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
-			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
-			"  .SsFmin               = 0x%04x\n"
-			"  .Padding_16           = 0x%04x\n",
-			pptable->DpmDescriptor[PPCLK_DCLK].VoltageMode,
-			pptable->DpmDescriptor[PPCLK_DCLK].SnapToDiscrete,
-			pptable->DpmDescriptor[PPCLK_DCLK].NumDiscreteLevels,
-			pptable->DpmDescriptor[PPCLK_DCLK].padding,
-			pptable->DpmDescriptor[PPCLK_DCLK].ConversionToAvfsClk.m,
-			pptable->DpmDescriptor[PPCLK_DCLK].ConversionToAvfsClk.b,
-			pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.a,
-			pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.b,
-			pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.c,
-			pptable->DpmDescriptor[PPCLK_DCLK].SsFmin,
-			pptable->DpmDescriptor[PPCLK_DCLK].Padding16);
-
-	dev_info(smu->adev->dev, "[PPCLK_SOCCLK]\n"
-			"  .VoltageMode          = 0x%02x\n"
-			"  .SnapToDiscrete       = 0x%02x\n"
-			"  .NumDiscreteLevels    = 0x%02x\n"
-			"  .padding              = 0x%02x\n"
-			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
-			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
-			"  .SsFmin               = 0x%04x\n"
-			"  .Padding_16           = 0x%04x\n",
-			pptable->DpmDescriptor[PPCLK_SOCCLK].VoltageMode,
-			pptable->DpmDescriptor[PPCLK_SOCCLK].SnapToDiscrete,
-			pptable->DpmDescriptor[PPCLK_SOCCLK].NumDiscreteLevels,
-			pptable->DpmDescriptor[PPCLK_SOCCLK].padding,
-			pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.m,
-			pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.b,
-			pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.a,
-			pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.b,
-			pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.c,
-			pptable->DpmDescriptor[PPCLK_SOCCLK].SsFmin,
-			pptable->DpmDescriptor[PPCLK_SOCCLK].Padding16);
-
-	dev_info(smu->adev->dev, "[PPCLK_UCLK]\n"
-			"  .VoltageMode          = 0x%02x\n"
-			"  .SnapToDiscrete       = 0x%02x\n"
-			"  .NumDiscreteLevels    = 0x%02x\n"
-			"  .padding              = 0x%02x\n"
-			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
-			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
-			"  .SsFmin               = 0x%04x\n"
-			"  .Padding_16           = 0x%04x\n",
-			pptable->DpmDescriptor[PPCLK_UCLK].VoltageMode,
-			pptable->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete,
-			pptable->DpmDescriptor[PPCLK_UCLK].NumDiscreteLevels,
-			pptable->DpmDescriptor[PPCLK_UCLK].padding,
-			pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.m,
-			pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.b,
-			pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.a,
-			pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.b,
-			pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.c,
-			pptable->DpmDescriptor[PPCLK_UCLK].SsFmin,
-			pptable->DpmDescriptor[PPCLK_UCLK].Padding16);
-
-	dev_info(smu->adev->dev, "[PPCLK_FCLK]\n"
-			"  .VoltageMode          = 0x%02x\n"
-			"  .SnapToDiscrete       = 0x%02x\n"
-			"  .NumDiscreteLevels    = 0x%02x\n"
-			"  .padding              = 0x%02x\n"
-			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
-			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
-			"  .SsFmin               = 0x%04x\n"
-			"  .Padding_16           = 0x%04x\n",
-			pptable->DpmDescriptor[PPCLK_FCLK].VoltageMode,
-			pptable->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete,
-			pptable->DpmDescriptor[PPCLK_FCLK].NumDiscreteLevels,
-			pptable->DpmDescriptor[PPCLK_FCLK].padding,
-			pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.m,
-			pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.b,
-			pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.a,
-			pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.b,
-			pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.c,
-			pptable->DpmDescriptor[PPCLK_FCLK].SsFmin,
-			pptable->DpmDescriptor[PPCLK_FCLK].Padding16);
-
+	dev_info(smu->adev->dev, "UlvGfxclkBypass = %d\n",
+		 pptable->UlvGfxclkBypass);
+	dev_info(smu->adev->dev, "Padding234[0] = 0x%02x\n",
+		 pptable->Padding234[0]);
+	dev_info(smu->adev->dev, "Padding234[1] = 0x%02x\n",
+		 pptable->Padding234[1]);
+	dev_info(smu->adev->dev, "Padding234[2] = 0x%02x\n",
+		 pptable->Padding234[2]);
+
+	dev_info(smu->adev->dev, "MinVoltageGfx = %d\n",
+		 pptable->MinVoltageGfx);
+	dev_info(smu->adev->dev, "MinVoltageSoc = %d\n",
+		 pptable->MinVoltageSoc);
+	dev_info(smu->adev->dev, "MaxVoltageGfx = %d\n",
+		 pptable->MaxVoltageGfx);
+	dev_info(smu->adev->dev, "MaxVoltageSoc = %d\n",
+		 pptable->MaxVoltageSoc);
+
+	dev_info(smu->adev->dev, "LoadLineResistanceGfx = %d\n",
+		 pptable->LoadLineResistanceGfx);
+	dev_info(smu->adev->dev, "LoadLineResistanceSoc = %d\n",
+		 pptable->LoadLineResistanceSoc);
+
+	dev_info(smu->adev->dev,
+		 "[PPCLK_GFXCLK]\n"
+		 "  .VoltageMode          = 0x%02x\n"
+		 "  .SnapToDiscrete       = 0x%02x\n"
+		 "  .NumDiscreteLevels    = 0x%02x\n"
+		 "  .padding              = 0x%02x\n"
+		 "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
+		 "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
+		 "  .SsFmin               = 0x%04x\n"
+		 "  .Padding_16           = 0x%04x\n",
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].VoltageMode,
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].SnapToDiscrete,
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].NumDiscreteLevels,
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].padding,
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.m,
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.b,
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.a,
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.b,
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.c,
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].SsFmin,
+		 pptable->DpmDescriptor[PPCLK_GFXCLK].Padding16);
+
+	dev_info(smu->adev->dev,
+		 "[PPCLK_VCLK]\n"
+		 "  .VoltageMode          = 0x%02x\n"
+		 "  .SnapToDiscrete       = 0x%02x\n"
+		 "  .NumDiscreteLevels    = 0x%02x\n"
+		 "  .padding              = 0x%02x\n"
+		 "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
+		 "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
+		 "  .SsFmin               = 0x%04x\n"
+		 "  .Padding_16           = 0x%04x\n",
+		 pptable->DpmDescriptor[PPCLK_VCLK].VoltageMode,
+		 pptable->DpmDescriptor[PPCLK_VCLK].SnapToDiscrete,
+		 pptable->DpmDescriptor[PPCLK_VCLK].NumDiscreteLevels,
+		 pptable->DpmDescriptor[PPCLK_VCLK].padding,
+		 pptable->DpmDescriptor[PPCLK_VCLK].ConversionToAvfsClk.m,
+		 pptable->DpmDescriptor[PPCLK_VCLK].ConversionToAvfsClk.b,
+		 pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.a,
+		 pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.b,
+		 pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.c,
+		 pptable->DpmDescriptor[PPCLK_VCLK].SsFmin,
+		 pptable->DpmDescriptor[PPCLK_VCLK].Padding16);
+
+	dev_info(smu->adev->dev,
+		 "[PPCLK_DCLK]\n"
+		 "  .VoltageMode          = 0x%02x\n"
+		 "  .SnapToDiscrete       = 0x%02x\n"
+		 "  .NumDiscreteLevels    = 0x%02x\n"
+		 "  .padding              = 0x%02x\n"
+		 "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
+		 "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
+		 "  .SsFmin               = 0x%04x\n"
+		 "  .Padding_16           = 0x%04x\n",
+		 pptable->DpmDescriptor[PPCLK_DCLK].VoltageMode,
+		 pptable->DpmDescriptor[PPCLK_DCLK].SnapToDiscrete,
+		 pptable->DpmDescriptor[PPCLK_DCLK].NumDiscreteLevels,
+		 pptable->DpmDescriptor[PPCLK_DCLK].padding,
+		 pptable->DpmDescriptor[PPCLK_DCLK].ConversionToAvfsClk.m,
+		 pptable->DpmDescriptor[PPCLK_DCLK].ConversionToAvfsClk.b,
+		 pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.a,
+		 pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.b,
+		 pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.c,
+		 pptable->DpmDescriptor[PPCLK_DCLK].SsFmin,
+		 pptable->DpmDescriptor[PPCLK_DCLK].Padding16);
+
+	dev_info(smu->adev->dev,
+		 "[PPCLK_SOCCLK]\n"
+		 "  .VoltageMode          = 0x%02x\n"
+		 "  .SnapToDiscrete       = 0x%02x\n"
+		 "  .NumDiscreteLevels    = 0x%02x\n"
+		 "  .padding              = 0x%02x\n"
+		 "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
+		 "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
+		 "  .SsFmin               = 0x%04x\n"
+		 "  .Padding_16           = 0x%04x\n",
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].VoltageMode,
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].SnapToDiscrete,
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].NumDiscreteLevels,
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].padding,
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.m,
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.b,
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.a,
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.b,
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.c,
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].SsFmin,
+		 pptable->DpmDescriptor[PPCLK_SOCCLK].Padding16);
+
+	dev_info(smu->adev->dev,
+		 "[PPCLK_UCLK]\n"
+		 "  .VoltageMode          = 0x%02x\n"
+		 "  .SnapToDiscrete       = 0x%02x\n"
+		 "  .NumDiscreteLevels    = 0x%02x\n"
+		 "  .padding              = 0x%02x\n"
+		 "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
+		 "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
+		 "  .SsFmin               = 0x%04x\n"
+		 "  .Padding_16           = 0x%04x\n",
+		 pptable->DpmDescriptor[PPCLK_UCLK].VoltageMode,
+		 pptable->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete,
+		 pptable->DpmDescriptor[PPCLK_UCLK].NumDiscreteLevels,
+		 pptable->DpmDescriptor[PPCLK_UCLK].padding,
+		 pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.m,
+		 pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.b,
+		 pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.a,
+		 pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.b,
+		 pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.c,
+		 pptable->DpmDescriptor[PPCLK_UCLK].SsFmin,
+		 pptable->DpmDescriptor[PPCLK_UCLK].Padding16);
+
+	dev_info(smu->adev->dev,
+		 "[PPCLK_FCLK]\n"
+		 "  .VoltageMode          = 0x%02x\n"
+		 "  .SnapToDiscrete       = 0x%02x\n"
+		 "  .NumDiscreteLevels    = 0x%02x\n"
+		 "  .padding              = 0x%02x\n"
+		 "  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
+		 "  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n"
+		 "  .SsFmin               = 0x%04x\n"
+		 "  .Padding_16           = 0x%04x\n",
+		 pptable->DpmDescriptor[PPCLK_FCLK].VoltageMode,
+		 pptable->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete,
+		 pptable->DpmDescriptor[PPCLK_FCLK].NumDiscreteLevels,
+		 pptable->DpmDescriptor[PPCLK_FCLK].padding,
+		 pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.m,
+		 pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.b,
+		 pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.a,
+		 pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.b,
+		 pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.c,
+		 pptable->DpmDescriptor[PPCLK_FCLK].SsFmin,
+		 pptable->DpmDescriptor[PPCLK_FCLK].Padding16);
 
 	dev_info(smu->adev->dev, "FreqTableGfx\n");
 	for (i = 0; i < NUM_GFXCLK_DPM_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i, pptable->FreqTableGfx[i]);
+		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i,
+			 pptable->FreqTableGfx[i]);
 
 	dev_info(smu->adev->dev, "FreqTableVclk\n");
 	for (i = 0; i < NUM_VCLK_DPM_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i, pptable->FreqTableVclk[i]);
+		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i,
+			 pptable->FreqTableVclk[i]);
 
 	dev_info(smu->adev->dev, "FreqTableDclk\n");
 	for (i = 0; i < NUM_DCLK_DPM_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i, pptable->FreqTableDclk[i]);
+		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i,
+			 pptable->FreqTableDclk[i]);
 
 	dev_info(smu->adev->dev, "FreqTableSocclk\n");
 	for (i = 0; i < NUM_SOCCLK_DPM_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i, pptable->FreqTableSocclk[i]);
+		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i,
+			 pptable->FreqTableSocclk[i]);
 
 	dev_info(smu->adev->dev, "FreqTableUclk\n");
 	for (i = 0; i < NUM_UCLK_DPM_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i, pptable->FreqTableUclk[i]);
+		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i,
+			 pptable->FreqTableUclk[i]);
 
 	dev_info(smu->adev->dev, "FreqTableFclk\n");
 	for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i, pptable->FreqTableFclk[i]);
+		dev_info(smu->adev->dev, "  .[%02d] = %d\n", i,
+			 pptable->FreqTableFclk[i]);
 
 	dev_info(smu->adev->dev, "Mp0clkFreq\n");
 	for (i = 0; i < NUM_MP0CLK_DPM_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%d] = %d\n", i, pptable->Mp0clkFreq[i]);
+		dev_info(smu->adev->dev, "  .[%d] = %d\n", i,
+			 pptable->Mp0clkFreq[i]);
 
 	dev_info(smu->adev->dev, "Mp0DpmVoltage\n");
 	for (i = 0; i < NUM_MP0CLK_DPM_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%d] = %d\n", i, pptable->Mp0DpmVoltage[i]);
+		dev_info(smu->adev->dev, "  .[%d] = %d\n", i,
+			 pptable->Mp0DpmVoltage[i]);
 
 	dev_info(smu->adev->dev, "GfxclkFidle = 0x%x\n", pptable->GfxclkFidle);
-	dev_info(smu->adev->dev, "GfxclkSlewRate = 0x%x\n", pptable->GfxclkSlewRate);
-	dev_info(smu->adev->dev, "Padding567[0] = 0x%x\n", pptable->Padding567[0]);
-	dev_info(smu->adev->dev, "Padding567[1] = 0x%x\n", pptable->Padding567[1]);
-	dev_info(smu->adev->dev, "Padding567[2] = 0x%x\n", pptable->Padding567[2]);
-	dev_info(smu->adev->dev, "Padding567[3] = 0x%x\n", pptable->Padding567[3]);
-	dev_info(smu->adev->dev, "GfxclkDsMaxFreq = %d\n", pptable->GfxclkDsMaxFreq);
-	dev_info(smu->adev->dev, "GfxclkSource = 0x%x\n", pptable->GfxclkSource);
+	dev_info(smu->adev->dev, "GfxclkSlewRate = 0x%x\n",
+		 pptable->GfxclkSlewRate);
+	dev_info(smu->adev->dev, "Padding567[0] = 0x%x\n",
+		 pptable->Padding567[0]);
+	dev_info(smu->adev->dev, "Padding567[1] = 0x%x\n",
+		 pptable->Padding567[1]);
+	dev_info(smu->adev->dev, "Padding567[2] = 0x%x\n",
+		 pptable->Padding567[2]);
+	dev_info(smu->adev->dev, "Padding567[3] = 0x%x\n",
+		 pptable->Padding567[3]);
+	dev_info(smu->adev->dev, "GfxclkDsMaxFreq = %d\n",
+		 pptable->GfxclkDsMaxFreq);
+	dev_info(smu->adev->dev, "GfxclkSource = 0x%x\n",
+		 pptable->GfxclkSource);
 	dev_info(smu->adev->dev, "Padding456 = 0x%x\n", pptable->Padding456);
 
 	dev_info(smu->adev->dev, "EnableTdpm = %d\n", pptable->EnableTdpm);
-	dev_info(smu->adev->dev, "TdpmHighHystTemperature = %d\n", pptable->TdpmHighHystTemperature);
-	dev_info(smu->adev->dev, "TdpmLowHystTemperature = %d\n", pptable->TdpmLowHystTemperature);
-	dev_info(smu->adev->dev, "GfxclkFreqHighTempLimit = %d\n", pptable->GfxclkFreqHighTempLimit);
+	dev_info(smu->adev->dev, "TdpmHighHystTemperature = %d\n",
+		 pptable->TdpmHighHystTemperature);
+	dev_info(smu->adev->dev, "TdpmLowHystTemperature = %d\n",
+		 pptable->TdpmLowHystTemperature);
+	dev_info(smu->adev->dev, "GfxclkFreqHighTempLimit = %d\n",
+		 pptable->GfxclkFreqHighTempLimit);
 
 	dev_info(smu->adev->dev, "FanStopTemp = %d\n", pptable->FanStopTemp);
 	dev_info(smu->adev->dev, "FanStartTemp = %d\n", pptable->FanStartTemp);
 
 	dev_info(smu->adev->dev, "FanGainEdge = %d\n", pptable->FanGainEdge);
-	dev_info(smu->adev->dev, "FanGainHotspot = %d\n", pptable->FanGainHotspot);
+	dev_info(smu->adev->dev, "FanGainHotspot = %d\n",
+		 pptable->FanGainHotspot);
 	dev_info(smu->adev->dev, "FanGainVrGfx = %d\n", pptable->FanGainVrGfx);
 	dev_info(smu->adev->dev, "FanGainVrSoc = %d\n", pptable->FanGainVrSoc);
 	dev_info(smu->adev->dev, "FanGainVrMem = %d\n", pptable->FanGainVrMem);
 	dev_info(smu->adev->dev, "FanGainHbm = %d\n", pptable->FanGainHbm);
 
 	dev_info(smu->adev->dev, "FanPwmMin = %d\n", pptable->FanPwmMin);
-	dev_info(smu->adev->dev, "FanAcousticLimitRpm = %d\n", pptable->FanAcousticLimitRpm);
-	dev_info(smu->adev->dev, "FanThrottlingRpm = %d\n", pptable->FanThrottlingRpm);
-	dev_info(smu->adev->dev, "FanMaximumRpm = %d\n", pptable->FanMaximumRpm);
-	dev_info(smu->adev->dev, "FanTargetTemperature = %d\n", pptable->FanTargetTemperature);
-	dev_info(smu->adev->dev, "FanTargetGfxclk = %d\n", pptable->FanTargetGfxclk);
-	dev_info(smu->adev->dev, "FanZeroRpmEnable = %d\n", pptable->FanZeroRpmEnable);
-	dev_info(smu->adev->dev, "FanTachEdgePerRev = %d\n", pptable->FanTachEdgePerRev);
-	dev_info(smu->adev->dev, "FanTempInputSelect = %d\n", pptable->FanTempInputSelect);
-
-	dev_info(smu->adev->dev, "FuzzyFan_ErrorSetDelta = %d\n", pptable->FuzzyFan_ErrorSetDelta);
-	dev_info(smu->adev->dev, "FuzzyFan_ErrorRateSetDelta = %d\n", pptable->FuzzyFan_ErrorRateSetDelta);
-	dev_info(smu->adev->dev, "FuzzyFan_PwmSetDelta = %d\n", pptable->FuzzyFan_PwmSetDelta);
-	dev_info(smu->adev->dev, "FuzzyFan_Reserved = %d\n", pptable->FuzzyFan_Reserved);
-
-	dev_info(smu->adev->dev, "OverrideAvfsGb[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_GFX]);
-	dev_info(smu->adev->dev, "OverrideAvfsGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_SOC]);
-	dev_info(smu->adev->dev, "Padding8_Avfs[0] = %d\n", pptable->Padding8_Avfs[0]);
-	dev_info(smu->adev->dev, "Padding8_Avfs[1] = %d\n", pptable->Padding8_Avfs[1]);
+	dev_info(smu->adev->dev, "FanAcousticLimitRpm = %d\n",
+		 pptable->FanAcousticLimitRpm);
+	dev_info(smu->adev->dev, "FanThrottlingRpm = %d\n",
+		 pptable->FanThrottlingRpm);
+	dev_info(smu->adev->dev, "FanMaximumRpm = %d\n",
+		 pptable->FanMaximumRpm);
+	dev_info(smu->adev->dev, "FanTargetTemperature = %d\n",
+		 pptable->FanTargetTemperature);
+	dev_info(smu->adev->dev, "FanTargetGfxclk = %d\n",
+		 pptable->FanTargetGfxclk);
+	dev_info(smu->adev->dev, "FanZeroRpmEnable = %d\n",
+		 pptable->FanZeroRpmEnable);
+	dev_info(smu->adev->dev, "FanTachEdgePerRev = %d\n",
+		 pptable->FanTachEdgePerRev);
+	dev_info(smu->adev->dev, "FanTempInputSelect = %d\n",
+		 pptable->FanTempInputSelect);
+
+	dev_info(smu->adev->dev, "FuzzyFan_ErrorSetDelta = %d\n",
+		 pptable->FuzzyFan_ErrorSetDelta);
+	dev_info(smu->adev->dev, "FuzzyFan_ErrorRateSetDelta = %d\n",
+		 pptable->FuzzyFan_ErrorRateSetDelta);
+	dev_info(smu->adev->dev, "FuzzyFan_PwmSetDelta = %d\n",
+		 pptable->FuzzyFan_PwmSetDelta);
+	dev_info(smu->adev->dev, "FuzzyFan_Reserved = %d\n",
+		 pptable->FuzzyFan_Reserved);
+
+	dev_info(smu->adev->dev, "OverrideAvfsGb[AVFS_VOLTAGE_GFX] = 0x%x\n",
+		 pptable->OverrideAvfsGb[AVFS_VOLTAGE_GFX]);
+	dev_info(smu->adev->dev, "OverrideAvfsGb[AVFS_VOLTAGE_SOC] = 0x%x\n",
+		 pptable->OverrideAvfsGb[AVFS_VOLTAGE_SOC]);
+	dev_info(smu->adev->dev, "Padding8_Avfs[0] = %d\n",
+		 pptable->Padding8_Avfs[0]);
+	dev_info(smu->adev->dev, "Padding8_Avfs[1] = %d\n",
+		 pptable->Padding8_Avfs[1]);
 
 	dev_info(smu->adev->dev, "dBtcGbGfxPll{a = 0x%x b = 0x%x c = 0x%x}\n",
-			pptable->dBtcGbGfxPll.a,
-			pptable->dBtcGbGfxPll.b,
-			pptable->dBtcGbGfxPll.c);
+		 pptable->dBtcGbGfxPll.a, pptable->dBtcGbGfxPll.b,
+		 pptable->dBtcGbGfxPll.c);
 	dev_info(smu->adev->dev, "dBtcGbGfxAfll{a = 0x%x b = 0x%x c = 0x%x}\n",
-			pptable->dBtcGbGfxAfll.a,
-			pptable->dBtcGbGfxAfll.b,
-			pptable->dBtcGbGfxAfll.c);
+		 pptable->dBtcGbGfxAfll.a, pptable->dBtcGbGfxAfll.b,
+		 pptable->dBtcGbGfxAfll.c);
 	dev_info(smu->adev->dev, "dBtcGbSoc{a = 0x%x b = 0x%x c = 0x%x}\n",
-			pptable->dBtcGbSoc.a,
-			pptable->dBtcGbSoc.b,
-			pptable->dBtcGbSoc.c);
-
-	dev_info(smu->adev->dev, "qAgingGb[AVFS_VOLTAGE_GFX]{m = 0x%x b = 0x%x}\n",
-			pptable->qAgingGb[AVFS_VOLTAGE_GFX].m,
-			pptable->qAgingGb[AVFS_VOLTAGE_GFX].b);
-	dev_info(smu->adev->dev, "qAgingGb[AVFS_VOLTAGE_SOC]{m = 0x%x b = 0x%x}\n",
-			pptable->qAgingGb[AVFS_VOLTAGE_SOC].m,
-			pptable->qAgingGb[AVFS_VOLTAGE_SOC].b);
-
-	dev_info(smu->adev->dev, "qStaticVoltageOffset[AVFS_VOLTAGE_GFX]{a = 0x%x b = 0x%x c = 0x%x}\n",
-			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].a,
-			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].b,
-			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].c);
-	dev_info(smu->adev->dev, "qStaticVoltageOffset[AVFS_VOLTAGE_SOC]{a = 0x%x b = 0x%x c = 0x%x}\n",
-			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].a,
-			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].b,
-			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].c);
-
-	dev_info(smu->adev->dev, "DcTol[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_GFX]);
-	dev_info(smu->adev->dev, "DcTol[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_SOC]);
-
-	dev_info(smu->adev->dev, "DcBtcEnabled[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_GFX]);
-	dev_info(smu->adev->dev, "DcBtcEnabled[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_SOC]);
-	dev_info(smu->adev->dev, "Padding8_GfxBtc[0] = 0x%x\n", pptable->Padding8_GfxBtc[0]);
-	dev_info(smu->adev->dev, "Padding8_GfxBtc[1] = 0x%x\n", pptable->Padding8_GfxBtc[1]);
-
-	dev_info(smu->adev->dev, "DcBtcMin[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_GFX]);
-	dev_info(smu->adev->dev, "DcBtcMin[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_SOC]);
-	dev_info(smu->adev->dev, "DcBtcMax[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_GFX]);
-	dev_info(smu->adev->dev, "DcBtcMax[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_SOC]);
-
-	dev_info(smu->adev->dev, "DcBtcGb[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_GFX]);
-	dev_info(smu->adev->dev, "DcBtcGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_SOC]);
+		 pptable->dBtcGbSoc.a, pptable->dBtcGbSoc.b,
+		 pptable->dBtcGbSoc.c);
+
+	dev_info(smu->adev->dev,
+		 "qAgingGb[AVFS_VOLTAGE_GFX]{m = 0x%x b = 0x%x}\n",
+		 pptable->qAgingGb[AVFS_VOLTAGE_GFX].m,
+		 pptable->qAgingGb[AVFS_VOLTAGE_GFX].b);
+	dev_info(smu->adev->dev,
+		 "qAgingGb[AVFS_VOLTAGE_SOC]{m = 0x%x b = 0x%x}\n",
+		 pptable->qAgingGb[AVFS_VOLTAGE_SOC].m,
+		 pptable->qAgingGb[AVFS_VOLTAGE_SOC].b);
+
+	dev_info(
+		smu->adev->dev,
+		"qStaticVoltageOffset[AVFS_VOLTAGE_GFX]{a = 0x%x b = 0x%x c = 0x%x}\n",
+		pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].a,
+		pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].b,
+		pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].c);
+	dev_info(
+		smu->adev->dev,
+		"qStaticVoltageOffset[AVFS_VOLTAGE_SOC]{a = 0x%x b = 0x%x c = 0x%x}\n",
+		pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].a,
+		pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].b,
+		pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].c);
+
+	dev_info(smu->adev->dev, "DcTol[AVFS_VOLTAGE_GFX] = 0x%x\n",
+		 pptable->DcTol[AVFS_VOLTAGE_GFX]);
+	dev_info(smu->adev->dev, "DcTol[AVFS_VOLTAGE_SOC] = 0x%x\n",
+		 pptable->DcTol[AVFS_VOLTAGE_SOC]);
+
+	dev_info(smu->adev->dev, "DcBtcEnabled[AVFS_VOLTAGE_GFX] = 0x%x\n",
+		 pptable->DcBtcEnabled[AVFS_VOLTAGE_GFX]);
+	dev_info(smu->adev->dev, "DcBtcEnabled[AVFS_VOLTAGE_SOC] = 0x%x\n",
+		 pptable->DcBtcEnabled[AVFS_VOLTAGE_SOC]);
+	dev_info(smu->adev->dev, "Padding8_GfxBtc[0] = 0x%x\n",
+		 pptable->Padding8_GfxBtc[0]);
+	dev_info(smu->adev->dev, "Padding8_GfxBtc[1] = 0x%x\n",
+		 pptable->Padding8_GfxBtc[1]);
+
+	dev_info(smu->adev->dev, "DcBtcMin[AVFS_VOLTAGE_GFX] = 0x%x\n",
+		 pptable->DcBtcMin[AVFS_VOLTAGE_GFX]);
+	dev_info(smu->adev->dev, "DcBtcMin[AVFS_VOLTAGE_SOC] = 0x%x\n",
+		 pptable->DcBtcMin[AVFS_VOLTAGE_SOC]);
+	dev_info(smu->adev->dev, "DcBtcMax[AVFS_VOLTAGE_GFX] = 0x%x\n",
+		 pptable->DcBtcMax[AVFS_VOLTAGE_GFX]);
+	dev_info(smu->adev->dev, "DcBtcMax[AVFS_VOLTAGE_SOC] = 0x%x\n",
+		 pptable->DcBtcMax[AVFS_VOLTAGE_SOC]);
+
+	dev_info(smu->adev->dev, "DcBtcGb[AVFS_VOLTAGE_GFX] = 0x%x\n",
+		 pptable->DcBtcGb[AVFS_VOLTAGE_GFX]);
+	dev_info(smu->adev->dev, "DcBtcGb[AVFS_VOLTAGE_SOC] = 0x%x\n",
+		 pptable->DcBtcGb[AVFS_VOLTAGE_SOC]);
 
 	dev_info(smu->adev->dev, "XgmiDpmPstates\n");
 	for (i = 0; i < NUM_XGMI_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%d] = %d\n", i, pptable->XgmiDpmPstates[i]);
-	dev_info(smu->adev->dev, "XgmiDpmSpare[0] = 0x%02x\n", pptable->XgmiDpmSpare[0]);
-	dev_info(smu->adev->dev, "XgmiDpmSpare[1] = 0x%02x\n", pptable->XgmiDpmSpare[1]);
+		dev_info(smu->adev->dev, "  .[%d] = %d\n", i,
+			 pptable->XgmiDpmPstates[i]);
+	dev_info(smu->adev->dev, "XgmiDpmSpare[0] = 0x%02x\n",
+		 pptable->XgmiDpmSpare[0]);
+	dev_info(smu->adev->dev, "XgmiDpmSpare[1] = 0x%02x\n",
+		 pptable->XgmiDpmSpare[1]);
 
 	dev_info(smu->adev->dev, "VDDGFX_TVmin = %d\n", pptable->VDDGFX_TVmin);
 	dev_info(smu->adev->dev, "VDDSOC_TVmin = %d\n", pptable->VDDSOC_TVmin);
-	dev_info(smu->adev->dev, "VDDGFX_Vmin_HiTemp = %d\n", pptable->VDDGFX_Vmin_HiTemp);
-	dev_info(smu->adev->dev, "VDDGFX_Vmin_LoTemp = %d\n", pptable->VDDGFX_Vmin_LoTemp);
-	dev_info(smu->adev->dev, "VDDSOC_Vmin_HiTemp = %d\n", pptable->VDDSOC_Vmin_HiTemp);
-	dev_info(smu->adev->dev, "VDDSOC_Vmin_LoTemp = %d\n", pptable->VDDSOC_Vmin_LoTemp);
-	dev_info(smu->adev->dev, "VDDGFX_TVminHystersis = %d\n", pptable->VDDGFX_TVminHystersis);
-	dev_info(smu->adev->dev, "VDDSOC_TVminHystersis = %d\n", pptable->VDDSOC_TVminHystersis);
-
-	dev_info(smu->adev->dev, "DebugOverrides = 0x%x\n", pptable->DebugOverrides);
-	dev_info(smu->adev->dev, "ReservedEquation0{a = 0x%x b = 0x%x c = 0x%x}\n",
-			pptable->ReservedEquation0.a,
-			pptable->ReservedEquation0.b,
-			pptable->ReservedEquation0.c);
-	dev_info(smu->adev->dev, "ReservedEquation1{a = 0x%x b = 0x%x c = 0x%x}\n",
-			pptable->ReservedEquation1.a,
-			pptable->ReservedEquation1.b,
-			pptable->ReservedEquation1.c);
-	dev_info(smu->adev->dev, "ReservedEquation2{a = 0x%x b = 0x%x c = 0x%x}\n",
-			pptable->ReservedEquation2.a,
-			pptable->ReservedEquation2.b,
-			pptable->ReservedEquation2.c);
-	dev_info(smu->adev->dev, "ReservedEquation3{a = 0x%x b = 0x%x c = 0x%x}\n",
-			pptable->ReservedEquation3.a,
-			pptable->ReservedEquation3.b,
-			pptable->ReservedEquation3.c);
-
-	dev_info(smu->adev->dev, "MinVoltageUlvGfx = %d\n", pptable->MinVoltageUlvGfx);
+	dev_info(smu->adev->dev, "VDDGFX_Vmin_HiTemp = %d\n",
+		 pptable->VDDGFX_Vmin_HiTemp);
+	dev_info(smu->adev->dev, "VDDGFX_Vmin_LoTemp = %d\n",
+		 pptable->VDDGFX_Vmin_LoTemp);
+	dev_info(smu->adev->dev, "VDDSOC_Vmin_HiTemp = %d\n",
+		 pptable->VDDSOC_Vmin_HiTemp);
+	dev_info(smu->adev->dev, "VDDSOC_Vmin_LoTemp = %d\n",
+		 pptable->VDDSOC_Vmin_LoTemp);
+	dev_info(smu->adev->dev, "VDDGFX_TVminHystersis = %d\n",
+		 pptable->VDDGFX_TVminHystersis);
+	dev_info(smu->adev->dev, "VDDSOC_TVminHystersis = %d\n",
+		 pptable->VDDSOC_TVminHystersis);
+
+	dev_info(smu->adev->dev, "DebugOverrides = 0x%x\n",
+		 pptable->DebugOverrides);
+	dev_info(smu->adev->dev,
+		 "ReservedEquation0{a = 0x%x b = 0x%x c = 0x%x}\n",
+		 pptable->ReservedEquation0.a, pptable->ReservedEquation0.b,
+		 pptable->ReservedEquation0.c);
+	dev_info(smu->adev->dev,
+		 "ReservedEquation1{a = 0x%x b = 0x%x c = 0x%x}\n",
+		 pptable->ReservedEquation1.a, pptable->ReservedEquation1.b,
+		 pptable->ReservedEquation1.c);
+	dev_info(smu->adev->dev,
+		 "ReservedEquation2{a = 0x%x b = 0x%x c = 0x%x}\n",
+		 pptable->ReservedEquation2.a, pptable->ReservedEquation2.b,
+		 pptable->ReservedEquation2.c);
+	dev_info(smu->adev->dev,
+		 "ReservedEquation3{a = 0x%x b = 0x%x c = 0x%x}\n",
+		 pptable->ReservedEquation3.a, pptable->ReservedEquation3.b,
+		 pptable->ReservedEquation3.c);
+
+	dev_info(smu->adev->dev, "MinVoltageUlvGfx = %d\n",
+		 pptable->MinVoltageUlvGfx);
 	dev_info(smu->adev->dev, "PaddingUlv = %d\n", pptable->PaddingUlv);
 
-	dev_info(smu->adev->dev, "TotalPowerConfig = %d\n", pptable->TotalPowerConfig);
-	dev_info(smu->adev->dev, "TotalPowerSpare1 = %d\n", pptable->TotalPowerSpare1);
-	dev_info(smu->adev->dev, "TotalPowerSpare2 = %d\n", pptable->TotalPowerSpare2);
+	dev_info(smu->adev->dev, "TotalPowerConfig = %d\n",
+		 pptable->TotalPowerConfig);
+	dev_info(smu->adev->dev, "TotalPowerSpare1 = %d\n",
+		 pptable->TotalPowerSpare1);
+	dev_info(smu->adev->dev, "TotalPowerSpare2 = %d\n",
+		 pptable->TotalPowerSpare2);
 
-	dev_info(smu->adev->dev, "PccThresholdLow = %d\n", pptable->PccThresholdLow);
-	dev_info(smu->adev->dev, "PccThresholdHigh = %d\n", pptable->PccThresholdHigh);
+	dev_info(smu->adev->dev, "PccThresholdLow = %d\n",
+		 pptable->PccThresholdLow);
+	dev_info(smu->adev->dev, "PccThresholdHigh = %d\n",
+		 pptable->PccThresholdHigh);
 
 	dev_info(smu->adev->dev, "Board Parameters:\n");
-	dev_info(smu->adev->dev, "MaxVoltageStepGfx = 0x%x\n", pptable->MaxVoltageStepGfx);
-	dev_info(smu->adev->dev, "MaxVoltageStepSoc = 0x%x\n", pptable->MaxVoltageStepSoc);
-
-	dev_info(smu->adev->dev, "VddGfxVrMapping = 0x%x\n", pptable->VddGfxVrMapping);
-	dev_info(smu->adev->dev, "VddSocVrMapping = 0x%x\n", pptable->VddSocVrMapping);
-	dev_info(smu->adev->dev, "VddMemVrMapping = 0x%x\n", pptable->VddMemVrMapping);
-	dev_info(smu->adev->dev, "BoardVrMapping = 0x%x\n", pptable->BoardVrMapping);
-
-	dev_info(smu->adev->dev, "GfxUlvPhaseSheddingMask = 0x%x\n", pptable->GfxUlvPhaseSheddingMask);
-	dev_info(smu->adev->dev, "ExternalSensorPresent = 0x%x\n", pptable->ExternalSensorPresent);
-
-	dev_info(smu->adev->dev, "GfxMaxCurrent = 0x%x\n", pptable->GfxMaxCurrent);
+	dev_info(smu->adev->dev, "MaxVoltageStepGfx = 0x%x\n",
+		 pptable->MaxVoltageStepGfx);
+	dev_info(smu->adev->dev, "MaxVoltageStepSoc = 0x%x\n",
+		 pptable->MaxVoltageStepSoc);
+
+	dev_info(smu->adev->dev, "VddGfxVrMapping = 0x%x\n",
+		 pptable->VddGfxVrMapping);
+	dev_info(smu->adev->dev, "VddSocVrMapping = 0x%x\n",
+		 pptable->VddSocVrMapping);
+	dev_info(smu->adev->dev, "VddMemVrMapping = 0x%x\n",
+		 pptable->VddMemVrMapping);
+	dev_info(smu->adev->dev, "BoardVrMapping = 0x%x\n",
+		 pptable->BoardVrMapping);
+
+	dev_info(smu->adev->dev, "GfxUlvPhaseSheddingMask = 0x%x\n",
+		 pptable->GfxUlvPhaseSheddingMask);
+	dev_info(smu->adev->dev, "ExternalSensorPresent = 0x%x\n",
+		 pptable->ExternalSensorPresent);
+
+	dev_info(smu->adev->dev, "GfxMaxCurrent = 0x%x\n",
+		 pptable->GfxMaxCurrent);
 	dev_info(smu->adev->dev, "GfxOffset = 0x%x\n", pptable->GfxOffset);
-	dev_info(smu->adev->dev, "Padding_TelemetryGfx = 0x%x\n", pptable->Padding_TelemetryGfx);
+	dev_info(smu->adev->dev, "Padding_TelemetryGfx = 0x%x\n",
+		 pptable->Padding_TelemetryGfx);
 
-	dev_info(smu->adev->dev, "SocMaxCurrent = 0x%x\n", pptable->SocMaxCurrent);
+	dev_info(smu->adev->dev, "SocMaxCurrent = 0x%x\n",
+		 pptable->SocMaxCurrent);
 	dev_info(smu->adev->dev, "SocOffset = 0x%x\n", pptable->SocOffset);
-	dev_info(smu->adev->dev, "Padding_TelemetrySoc = 0x%x\n", pptable->Padding_TelemetrySoc);
+	dev_info(smu->adev->dev, "Padding_TelemetrySoc = 0x%x\n",
+		 pptable->Padding_TelemetrySoc);
 
-	dev_info(smu->adev->dev, "MemMaxCurrent = 0x%x\n", pptable->MemMaxCurrent);
+	dev_info(smu->adev->dev, "MemMaxCurrent = 0x%x\n",
+		 pptable->MemMaxCurrent);
 	dev_info(smu->adev->dev, "MemOffset = 0x%x\n", pptable->MemOffset);
-	dev_info(smu->adev->dev, "Padding_TelemetryMem = 0x%x\n", pptable->Padding_TelemetryMem);
+	dev_info(smu->adev->dev, "Padding_TelemetryMem = 0x%x\n",
+		 pptable->Padding_TelemetryMem);
 
-	dev_info(smu->adev->dev, "BoardMaxCurrent = 0x%x\n", pptable->BoardMaxCurrent);
+	dev_info(smu->adev->dev, "BoardMaxCurrent = 0x%x\n",
+		 pptable->BoardMaxCurrent);
 	dev_info(smu->adev->dev, "BoardOffset = 0x%x\n", pptable->BoardOffset);
-	dev_info(smu->adev->dev, "Padding_TelemetryBoardInput = 0x%x\n", pptable->Padding_TelemetryBoardInput);
+	dev_info(smu->adev->dev, "Padding_TelemetryBoardInput = 0x%x\n",
+		 pptable->Padding_TelemetryBoardInput);
 
 	dev_info(smu->adev->dev, "VR0HotGpio = %d\n", pptable->VR0HotGpio);
-	dev_info(smu->adev->dev, "VR0HotPolarity = %d\n", pptable->VR0HotPolarity);
+	dev_info(smu->adev->dev, "VR0HotPolarity = %d\n",
+		 pptable->VR0HotPolarity);
 	dev_info(smu->adev->dev, "VR1HotGpio = %d\n", pptable->VR1HotGpio);
-	dev_info(smu->adev->dev, "VR1HotPolarity = %d\n", pptable->VR1HotPolarity);
-
-	dev_info(smu->adev->dev, "PllGfxclkSpreadEnabled = %d\n", pptable->PllGfxclkSpreadEnabled);
-	dev_info(smu->adev->dev, "PllGfxclkSpreadPercent = %d\n", pptable->PllGfxclkSpreadPercent);
-	dev_info(smu->adev->dev, "PllGfxclkSpreadFreq = %d\n", pptable->PllGfxclkSpreadFreq);
-
-	dev_info(smu->adev->dev, "UclkSpreadEnabled = %d\n", pptable->UclkSpreadEnabled);
-	dev_info(smu->adev->dev, "UclkSpreadPercent = %d\n", pptable->UclkSpreadPercent);
-	dev_info(smu->adev->dev, "UclkSpreadFreq = %d\n", pptable->UclkSpreadFreq);
-
-	dev_info(smu->adev->dev, "FclkSpreadEnabled = %d\n", pptable->FclkSpreadEnabled);
-	dev_info(smu->adev->dev, "FclkSpreadPercent = %d\n", pptable->FclkSpreadPercent);
-	dev_info(smu->adev->dev, "FclkSpreadFreq = %d\n", pptable->FclkSpreadFreq);
-
-	dev_info(smu->adev->dev, "FllGfxclkSpreadEnabled = %d\n", pptable->FllGfxclkSpreadEnabled);
-	dev_info(smu->adev->dev, "FllGfxclkSpreadPercent = %d\n", pptable->FllGfxclkSpreadPercent);
-	dev_info(smu->adev->dev, "FllGfxclkSpreadFreq = %d\n", pptable->FllGfxclkSpreadFreq);
+	dev_info(smu->adev->dev, "VR1HotPolarity = %d\n",
+		 pptable->VR1HotPolarity);
+
+	dev_info(smu->adev->dev, "PllGfxclkSpreadEnabled = %d\n",
+		 pptable->PllGfxclkSpreadEnabled);
+	dev_info(smu->adev->dev, "PllGfxclkSpreadPercent = %d\n",
+		 pptable->PllGfxclkSpreadPercent);
+	dev_info(smu->adev->dev, "PllGfxclkSpreadFreq = %d\n",
+		 pptable->PllGfxclkSpreadFreq);
+
+	dev_info(smu->adev->dev, "UclkSpreadEnabled = %d\n",
+		 pptable->UclkSpreadEnabled);
+	dev_info(smu->adev->dev, "UclkSpreadPercent = %d\n",
+		 pptable->UclkSpreadPercent);
+	dev_info(smu->adev->dev, "UclkSpreadFreq = %d\n",
+		 pptable->UclkSpreadFreq);
+
+	dev_info(smu->adev->dev, "FclkSpreadEnabled = %d\n",
+		 pptable->FclkSpreadEnabled);
+	dev_info(smu->adev->dev, "FclkSpreadPercent = %d\n",
+		 pptable->FclkSpreadPercent);
+	dev_info(smu->adev->dev, "FclkSpreadFreq = %d\n",
+		 pptable->FclkSpreadFreq);
+
+	dev_info(smu->adev->dev, "FllGfxclkSpreadEnabled = %d\n",
+		 pptable->FllGfxclkSpreadEnabled);
+	dev_info(smu->adev->dev, "FllGfxclkSpreadPercent = %d\n",
+		 pptable->FllGfxclkSpreadPercent);
+	dev_info(smu->adev->dev, "FllGfxclkSpreadFreq = %d\n",
+		 pptable->FllGfxclkSpreadFreq);
 
 	for (i = 0; i < NUM_I2C_CONTROLLERS; i++) {
 		dev_info(smu->adev->dev, "I2cControllers[%d]:\n", i);
 		dev_info(smu->adev->dev, "                   .Enabled = %d\n",
-				pptable->I2cControllers[i].Enabled);
-		dev_info(smu->adev->dev, "                   .SlaveAddress = 0x%x\n",
-				pptable->I2cControllers[i].SlaveAddress);
-		dev_info(smu->adev->dev, "                   .ControllerPort = %d\n",
-				pptable->I2cControllers[i].ControllerPort);
-		dev_info(smu->adev->dev, "                   .ControllerName = %d\n",
-				pptable->I2cControllers[i].ControllerName);
-		dev_info(smu->adev->dev, "                   .ThermalThrottler = %d\n",
-				pptable->I2cControllers[i].ThermalThrotter);
-		dev_info(smu->adev->dev, "                   .I2cProtocol = %d\n",
-				pptable->I2cControllers[i].I2cProtocol);
+			 pptable->I2cControllers[i].Enabled);
+		dev_info(smu->adev->dev,
+			 "                   .SlaveAddress = 0x%x\n",
+			 pptable->I2cControllers[i].SlaveAddress);
+		dev_info(smu->adev->dev,
+			 "                   .ControllerPort = %d\n",
+			 pptable->I2cControllers[i].ControllerPort);
+		dev_info(smu->adev->dev,
+			 "                   .ControllerName = %d\n",
+			 pptable->I2cControllers[i].ControllerName);
+		dev_info(smu->adev->dev,
+			 "                   .ThermalThrottler = %d\n",
+			 pptable->I2cControllers[i].ThermalThrotter);
+		dev_info(smu->adev->dev,
+			 "                   .I2cProtocol = %d\n",
+			 pptable->I2cControllers[i].I2cProtocol);
 		dev_info(smu->adev->dev, "                   .Speed = %d\n",
-				pptable->I2cControllers[i].Speed);
+			 pptable->I2cControllers[i].Speed);
 	}
 
-	dev_info(smu->adev->dev, "MemoryChannelEnabled = %d\n", pptable->MemoryChannelEnabled);
+	dev_info(smu->adev->dev, "MemoryChannelEnabled = %d\n",
+		 pptable->MemoryChannelEnabled);
 	dev_info(smu->adev->dev, "DramBitWidth = %d\n", pptable->DramBitWidth);
 
-	dev_info(smu->adev->dev, "TotalBoardPower = %d\n", pptable->TotalBoardPower);
+	dev_info(smu->adev->dev, "TotalBoardPower = %d\n",
+		 pptable->TotalBoardPower);
 
 	dev_info(smu->adev->dev, "XgmiLinkSpeed\n");
 	for (i = 0; i < NUM_XGMI_PSTATE_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%d] = %d\n", i, pptable->XgmiLinkSpeed[i]);
+		dev_info(smu->adev->dev, "  .[%d] = %d\n", i,
+			 pptable->XgmiLinkSpeed[i]);
 	dev_info(smu->adev->dev, "XgmiLinkWidth\n");
 	for (i = 0; i < NUM_XGMI_PSTATE_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%d] = %d\n", i, pptable->XgmiLinkWidth[i]);
+		dev_info(smu->adev->dev, "  .[%d] = %d\n", i,
+			 pptable->XgmiLinkWidth[i]);
 	dev_info(smu->adev->dev, "XgmiFclkFreq\n");
 	for (i = 0; i < NUM_XGMI_PSTATE_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%d] = %d\n", i, pptable->XgmiFclkFreq[i]);
+		dev_info(smu->adev->dev, "  .[%d] = %d\n", i,
+			 pptable->XgmiFclkFreq[i]);
 	dev_info(smu->adev->dev, "XgmiSocVoltage\n");
 	for (i = 0; i < NUM_XGMI_PSTATE_LEVELS; i++)
-		dev_info(smu->adev->dev, "  .[%d] = %d\n", i, pptable->XgmiSocVoltage[i]);
-
+		dev_info(smu->adev->dev, "  .[%d] = %d\n", i,
+			 pptable->XgmiSocVoltage[i]);
 }
 
 static bool arcturus_is_dpm_running(struct smu_context *smu)
@@ -1914,7 +2090,7 @@ static bool arcturus_is_dpm_running(struct smu_context *smu)
 	unsigned long feature_enabled;
 	ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);
 	feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |
-			   ((uint64_t)feature_mask[1] << 32));
+					  ((uint64_t)feature_mask[1] << 32));
 	return !!(feature_enabled & SMC_DPM_FEATURE);
 }
 
@@ -1926,18 +2102,22 @@ static int arcturus_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
 
 	if (enable) {
 		if (!smu_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) {
-			ret = smu_feature_set_enabled(smu, SMU_FEATURE_VCN_PG_BIT, 1);
+			ret = smu_feature_set_enabled(
+				smu, SMU_FEATURE_VCN_PG_BIT, 1);
 			if (ret) {
-				dev_err(smu->adev->dev, "[EnableVCNDPM] failed!\n");
+				dev_err(smu->adev->dev,
+					"[EnableVCNDPM] failed!\n");
 				return ret;
 			}
 		}
 		power_gate->vcn_gated = false;
 	} else {
 		if (smu_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) {
-			ret = smu_feature_set_enabled(smu, SMU_FEATURE_VCN_PG_BIT, 0);
+			ret = smu_feature_set_enabled(
+				smu, SMU_FEATURE_VCN_PG_BIT, 0);
 			if (ret) {
-				dev_err(smu->adev->dev, "[DisableVCNDPM] failed!\n");
+				dev_err(smu->adev->dev,
+					"[DisableVCNDPM] failed!\n");
 				return ret;
 			}
 		}
@@ -1947,9 +2127,9 @@ static int arcturus_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
 	return ret;
 }
 
-static void arcturus_fill_eeprom_i2c_req(SwI2cRequest_t  *req, bool write,
-				  uint8_t address, uint32_t numbytes,
-				  uint8_t *data)
+static void arcturus_fill_eeprom_i2c_req(SwI2cRequest_t *req, bool write,
+					 uint8_t address, uint32_t numbytes,
+					 uint8_t *data)
 {
 	int i;
 
@@ -1961,7 +2141,7 @@ static void arcturus_fill_eeprom_i2c_req(SwI2cRequest_t  *req, bool write,
 	req->NumCmds = numbytes;
 
 	for (i = 0; i < numbytes; i++) {
-		SwI2cCmd_t *cmd =  &req->SwI2cCmds[i];
+		SwI2cCmd_t *cmd = &req->SwI2cCmds[i];
 
 		/* First 2 bytes are always write for lower 2b EEPROM address */
 		if (i < 2)
@@ -1969,12 +2149,13 @@ static void arcturus_fill_eeprom_i2c_req(SwI2cRequest_t  *req, bool write,
 		else
 			cmd->Cmd = write;
 
-
 		/* Add RESTART for read  after address filled */
-		cmd->CmdConfig |= (i == 2 && !write) ? CMDCONFIG_RESTART_MASK : 0;
+		cmd->CmdConfig |=
+			(i == 2 && !write) ? CMDCONFIG_RESTART_MASK : 0;
 
 		/* Add STOP in the end */
-		cmd->CmdConfig |= (i == (numbytes - 1)) ? CMDCONFIG_STOP_MASK : 0;
+		cmd->CmdConfig |=
+			(i == (numbytes - 1)) ? CMDCONFIG_STOP_MASK : 0;
 
 		/* Fill with data regardless if read or write to simplify code */
 		cmd->RegisterAddr = data[i];
@@ -1982,11 +2163,10 @@ static void arcturus_fill_eeprom_i2c_req(SwI2cRequest_t  *req, bool write,
 }
 
 static int arcturus_i2c_eeprom_read_data(struct i2c_adapter *control,
-					       uint8_t address,
-					       uint8_t *data,
-					       uint32_t numbytes)
+					 uint8_t address, uint8_t *data,
+					 uint32_t numbytes)
 {
-	uint32_t  i, ret = 0;
+	uint32_t i, ret = 0;
 	SwI2cRequest_t req;
 	struct amdgpu_device *adev = to_amdgpu_device(control);
 	struct smu_table_context *smu_table = &adev->smu.smu_table;
@@ -1998,7 +2178,7 @@ static int arcturus_i2c_eeprom_read_data(struct i2c_adapter *control,
 	mutex_lock(&adev->smu.mutex);
 	/* Now read data starting with that address */
 	ret = smu_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req,
-					true);
+			       true);
 	mutex_unlock(&adev->smu.mutex);
 
 	if (!ret) {
@@ -2008,21 +2188,23 @@ static int arcturus_i2c_eeprom_read_data(struct i2c_adapter *control,
 		for (i = 0; i < numbytes; i++)
 			data[i] = res->SwI2cCmds[i].Data;
 
-		dev_dbg(adev->dev, "arcturus_i2c_eeprom_read_data, address = %x, bytes = %d, data :",
-				  (uint16_t)address, numbytes);
+		dev_dbg(adev->dev,
+			"arcturus_i2c_eeprom_read_data, address = %x, bytes = %d, data :",
+			(uint16_t)address, numbytes);
 
-		print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE,
-			       8, 1, data, numbytes, false);
+		print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE, 8, 1,
+			       data, numbytes, false);
 	} else
-		dev_err(adev->dev, "arcturus_i2c_eeprom_read_data - error occurred :%x", ret);
+		dev_err(adev->dev,
+			"arcturus_i2c_eeprom_read_data - error occurred :%x",
+			ret);
 
 	return ret;
 }
 
 static int arcturus_i2c_eeprom_write_data(struct i2c_adapter *control,
-						uint8_t address,
-						uint8_t *data,
-						uint32_t numbytes)
+					  uint8_t address, uint8_t *data,
+					  uint32_t numbytes)
 {
 	uint32_t ret;
 	SwI2cRequest_t req;
@@ -2032,15 +2214,17 @@ static int arcturus_i2c_eeprom_write_data(struct i2c_adapter *control,
 	arcturus_fill_eeprom_i2c_req(&req, true, address, numbytes, data);
 
 	mutex_lock(&adev->smu.mutex);
-	ret = smu_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req, true);
+	ret = smu_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req,
+			       true);
 	mutex_unlock(&adev->smu.mutex);
 
 	if (!ret) {
-		dev_dbg(adev->dev, "arcturus_i2c_write(), address = %x, bytes = %d , data: ",
-					 (uint16_t)address, numbytes);
+		dev_dbg(adev->dev,
+			"arcturus_i2c_write(), address = %x, bytes = %d , data: ",
+			(uint16_t)address, numbytes);
 
-		print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE,
-			       8, 1, data, numbytes, false);
+		print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE, 8, 1,
+			       data, numbytes, false);
 		/*
 		 * According to EEPROM spec there is a MAX of 10 ms required for
 		 * EEPROM to flush internal RX buffer after STOP was issued at the
@@ -2050,15 +2234,16 @@ static int arcturus_i2c_eeprom_write_data(struct i2c_adapter *control,
 		msleep(10);
 
 	} else
-		dev_err(adev->dev, "arcturus_i2c_write- error occurred :%x", ret);
+		dev_err(adev->dev, "arcturus_i2c_write- error occurred :%x",
+			ret);
 
 	return ret;
 }
 
 static int arcturus_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap,
-			      struct i2c_msg *msgs, int num)
+					struct i2c_msg *msgs, int num)
 {
-	uint32_t  i, j, ret, data_size, data_chunk_size, next_eeprom_addr = 0;
+	uint32_t i, j, ret, data_size, data_chunk_size, next_eeprom_addr = 0;
 	uint8_t *data_ptr, data_chunk[MAX_SW_I2C_COMMANDS] = { 0 };
 
 	for (i = 0; i < num; i++) {
@@ -2069,7 +2254,8 @@ static int arcturus_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap,
 		 */
 		data_size = msgs[i].len - 2;
 		data_chunk_size = MAX_SW_I2C_COMMANDS - 2;
-		next_eeprom_addr = (msgs[i].buf[0] << 8 & 0xff00) | (msgs[i].buf[1] & 0xff);
+		next_eeprom_addr = (msgs[i].buf[0] << 8 & 0xff00) |
+				   (msgs[i].buf[1] & 0xff);
 		data_ptr = msgs[i].buf + 2;
 
 		for (j = 0; j < data_size / data_chunk_size; j++) {
@@ -2078,18 +2264,19 @@ static int arcturus_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap,
 			data_chunk[1] = (next_eeprom_addr & 0xff);
 
 			if (msgs[i].flags & I2C_M_RD) {
-				ret = arcturus_i2c_eeprom_read_data(i2c_adap,
-								(uint8_t)msgs[i].addr,
-								data_chunk, MAX_SW_I2C_COMMANDS);
+				ret = arcturus_i2c_eeprom_read_data(
+					i2c_adap, (uint8_t)msgs[i].addr,
+					data_chunk, MAX_SW_I2C_COMMANDS);
 
-				memcpy(data_ptr, data_chunk + 2, data_chunk_size);
+				memcpy(data_ptr, data_chunk + 2,
+				       data_chunk_size);
 			} else {
+				memcpy(data_chunk + 2, data_ptr,
+				       data_chunk_size);
 
-				memcpy(data_chunk + 2, data_ptr, data_chunk_size);
-
-				ret = arcturus_i2c_eeprom_write_data(i2c_adap,
-								 (uint8_t)msgs[i].addr,
-								 data_chunk, MAX_SW_I2C_COMMANDS);
+				ret = arcturus_i2c_eeprom_write_data(
+					i2c_adap, (uint8_t)msgs[i].addr,
+					data_chunk, MAX_SW_I2C_COMMANDS);
 			}
 
 			if (ret) {
@@ -2106,17 +2293,21 @@ static int arcturus_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap,
 			data_chunk[1] = (next_eeprom_addr & 0xff);
 
 			if (msgs[i].flags & I2C_M_RD) {
-				ret = arcturus_i2c_eeprom_read_data(i2c_adap,
-								(uint8_t)msgs[i].addr,
-								data_chunk, (data_size % data_chunk_size) + 2);
+				ret = arcturus_i2c_eeprom_read_data(
+					i2c_adap, (uint8_t)msgs[i].addr,
+					data_chunk,
+					(data_size % data_chunk_size) + 2);
 
-				memcpy(data_ptr, data_chunk + 2, data_size % data_chunk_size);
+				memcpy(data_ptr, data_chunk + 2,
+				       data_size % data_chunk_size);
 			} else {
-				memcpy(data_chunk + 2, data_ptr, data_size % data_chunk_size);
+				memcpy(data_chunk + 2, data_ptr,
+				       data_size % data_chunk_size);
 
-				ret = arcturus_i2c_eeprom_write_data(i2c_adap,
-								 (uint8_t)msgs[i].addr,
-								 data_chunk, (data_size % data_chunk_size) + 2);
+				ret = arcturus_i2c_eeprom_write_data(
+					i2c_adap, (uint8_t)msgs[i].addr,
+					data_chunk,
+					(data_size % data_chunk_size) + 2);
 			}
 
 			if (ret) {
@@ -2135,7 +2326,6 @@ static u32 arcturus_i2c_eeprom_i2c_func(struct i2c_adapter *adap)
 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 }
 
-
 static const struct i2c_algorithm arcturus_i2c_eeprom_i2c_algo = {
 	.master_xfer = arcturus_i2c_eeprom_i2c_xfer,
 	.functionality = arcturus_i2c_eeprom_i2c_func,
@@ -2148,7 +2338,8 @@ static bool arcturus_i2c_adapter_is_added(struct i2c_adapter *control)
 	return control->dev.parent == &adev->pdev->dev;
 }
 
-static int arcturus_i2c_eeprom_control_init(struct smu_context *smu, struct i2c_adapter *control)
+static int arcturus_i2c_eeprom_control_init(struct smu_context *smu,
+					    struct i2c_adapter *control)
 {
 	struct amdgpu_device *adev = to_amdgpu_device(control);
 	int res;
@@ -2170,7 +2361,8 @@ static int arcturus_i2c_eeprom_control_init(struct smu_context *smu, struct i2c_
 	return res;
 }
 
-static void arcturus_i2c_eeprom_control_fini(struct smu_context *smu, struct i2c_adapter *control)
+static void arcturus_i2c_eeprom_control_fini(struct smu_context *smu,
+					     struct i2c_adapter *control)
 {
 	if (!arcturus_i2c_adapter_is_added(control))
 		return;
@@ -2185,13 +2377,17 @@ static void arcturus_get_unique_id(struct smu_context *smu)
 	uint64_t id;
 
 	if (smu_get_smc_version(smu, NULL, &smu_version)) {
-		dev_warn(adev->dev, "Failed to get smu version, cannot get unique_id or serial_number\n");
+		dev_warn(
+			adev->dev,
+			"Failed to get smu version, cannot get unique_id or serial_number\n");
 		return;
 	}
 
 	/* PPSMC_MSG_ReadSerial* is supported by 54.23.0 and onwards */
 	if (smu_version < 0x361700) {
-		dev_warn(adev->dev, "ReadSerial is only supported by PMFW 54.23.0 and onwards\n");
+		dev_warn(
+			adev->dev,
+			"ReadSerial is only supported by PMFW 54.23.0 and onwards\n");
 		return;
 	}
 
@@ -2233,11 +2429,13 @@ static int arcturus_set_df_cstate(struct smu_context *smu,
 
 	/* PPSMC_MSG_DFCstateControl is supported by 54.15.0 and onwards */
 	if (smu_version < 0x360F00) {
-		dev_err(smu->adev->dev, "DFCstateControl is only supported by PMFW 54.15.0 and onwards\n");
+		dev_err(smu->adev->dev,
+			"DFCstateControl is only supported by PMFW 54.15.0 and onwards\n");
 		return -EINVAL;
 	}
 
-	return smu_send_smc_msg_with_param(smu, SMU_MSG_DFCstateControl, state, NULL);
+	return smu_send_smc_msg_with_param(smu, SMU_MSG_DFCstateControl, state,
+					   NULL);
 }
 
 static int arcturus_allow_xgmi_power_down(struct smu_context *smu, bool en)
@@ -2253,19 +2451,16 @@ static int arcturus_allow_xgmi_power_down(struct smu_context *smu, bool en)
 
 	/* PPSMC_MSG_GmiPwrDnControl is supported by 54.23.0 and onwards */
 	if (smu_version < 0x00361700) {
-		dev_err(smu->adev->dev, "XGMI power down control is only supported by PMFW 54.23.0 and onwards\n");
+		dev_err(smu->adev->dev,
+			"XGMI power down control is only supported by PMFW 54.23.0 and onwards\n");
 		return -EINVAL;
 	}
 
 	if (en)
-		return smu_send_smc_msg_with_param(smu,
-						   SMU_MSG_GmiPwrDnControl,
-						   1,
-						   NULL);
-
-	return smu_send_smc_msg_with_param(smu,
-					   SMU_MSG_GmiPwrDnControl,
-					   0,
+		return smu_send_smc_msg_with_param(smu, SMU_MSG_GmiPwrDnControl,
+						   1, NULL);
+
+	return smu_send_smc_msg_with_param(smu, SMU_MSG_GmiPwrDnControl, 0,
 					   NULL);
 }
 
@@ -2273,13 +2468,13 @@ static const struct throttling_logging_label {
 	uint32_t feature_mask;
 	const char *label;
 } logging_label[] = {
-	{(1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU"},
-	{(1U << THROTTLER_TEMP_MEM_BIT), "HBM"},
-	{(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"},
-	{(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"},
-	{(1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail"},
-	{(1U << THROTTLER_VRHOT0_BIT), "VR0 HOT"},
-	{(1U << THROTTLER_VRHOT1_BIT), "VR1 HOT"},
+	{ (1U << THROTTLER_TEMP_HOTSPOT_BIT), "GPU" },
+	{ (1U << THROTTLER_TEMP_MEM_BIT), "HBM" },
+	{ (1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail" },
+	{ (1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail" },
+	{ (1U << THROTTLER_TEMP_VR_SOC_BIT), "VR of SOC rail" },
+	{ (1U << THROTTLER_VRHOT0_BIT), "VR0 HOT" },
+	{ (1U << THROTTLER_VRHOT1_BIT), "VR1 HOT" },
 };
 static void arcturus_log_thermal_throttling_event(struct smu_context *smu)
 {
@@ -2288,18 +2483,17 @@ static void arcturus_log_thermal_throttling_event(struct smu_context *smu)
 	uint32_t throttler_status;
 	char log_buf[256];
 
-	arcturus_get_smu_metrics_data(smu,
-				      METRICS_THROTTLER_STATUS,
+	arcturus_get_smu_metrics_data(smu, METRICS_THROTTLER_STATUS,
 				      &throttler_status);
 
 	memset(log_buf, 0, sizeof(log_buf));
 	for (throttler_idx = 0; throttler_idx < ARRAY_SIZE(logging_label);
 	     throttler_idx++) {
-		if (throttler_status & logging_label[throttler_idx].feature_mask) {
+		if (throttler_status &
+		    logging_label[throttler_idx].feature_mask) {
 			throtting_events++;
 			buf_idx += snprintf(log_buf + buf_idx,
-					    sizeof(log_buf) - buf_idx,
-					    "%s%s",
+					    sizeof(log_buf) - buf_idx, "%s%s",
 					    throtting_events > 1 ? " and " : "",
 					    logging_label[throttler_idx].label);
 			if (buf_idx >= sizeof(log_buf)) {
@@ -2310,8 +2504,10 @@ static void arcturus_log_thermal_throttling_event(struct smu_context *smu)
 		}
 	}
 
-	dev_warn(adev->dev, "WARN: GPU thermal throttling temperature reached, expect performance decrease. %s.\n",
-			log_buf);
+	dev_warn(
+		adev->dev,
+		"WARN: GPU thermal throttling temperature reached, expect performance decrease. %s.\n",
+		log_buf);
 }
 
 static const struct pptable_funcs arcturus_ppt_funcs = {
@@ -2320,7 +2516,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
 	.get_smu_clk_index = arcturus_get_smu_clk_index,
 	.get_smu_feature_index = arcturus_get_smu_feature_index,
 	.get_smu_table_index = arcturus_get_smu_table_index,
-	.get_smu_power_index= arcturus_get_pwr_src_index,
+	.get_smu_power_index = arcturus_get_pwr_src_index,
 	.get_workload_type = arcturus_get_workload_type,
 	/* internal structurs allocations */
 	.tables_init = arcturus_tables_init,
@@ -2376,7 +2572,8 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
 	.enable_thermal_alert = smu_v11_0_enable_thermal_alert,
 	.disable_thermal_alert = smu_v11_0_disable_thermal_alert,
 	.set_min_dcef_deep_sleep = NULL,
-	.display_clock_voltage_request = smu_v11_0_display_clock_voltage_request,
+	.display_clock_voltage_request =
+		smu_v11_0_display_clock_voltage_request,
 	.get_fan_control_mode = smu_v11_0_get_fan_control_mode,
 	.set_fan_control_mode = smu_v11_0_set_fan_control_mode,
 	.set_fan_speed_percent = smu_v11_0_set_fan_speed_percent,
@@ -2385,8 +2582,9 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
 	.gfx_off_control = smu_v11_0_gfx_off_control,
 	.register_irq_handler = smu_v11_0_register_irq_handler,
 	.set_azalia_d3_pme = smu_v11_0_set_azalia_d3_pme,
-	.get_max_sustainable_clocks_by_dc = smu_v11_0_get_max_sustainable_clocks_by_dc,
-	.baco_is_support= arcturus_is_baco_supported,
+	.get_max_sustainable_clocks_by_dc =
+		smu_v11_0_get_max_sustainable_clocks_by_dc,
+	.baco_is_support = arcturus_is_baco_supported,
 	.baco_get_state = smu_v11_0_baco_get_state,
 	.baco_set_state = smu_v11_0_baco_set_state,
 	.baco_enter = smu_v11_0_baco_enter,
-- 
2.28.0


From a36e0bfc184601939b2b99025412ab1b38523bf0 Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Wed, 26 Aug 2020 18:37:43 +0200
Subject: [PATCH 08/18] Add support for new mmap API in 5.8+

---
 amd/amdgpu/amdgpu_ttm.c | 16 ++++++++++++++++
 ttm/ttm_bo_vm.c         |  8 ++++++++
 2 files changed, 24 insertions(+)

diff --git a/amd/amdgpu/amdgpu_ttm.c b/amd/amdgpu/amdgpu_ttm.c
index fb3fe0d..a65b9af 100755
--- a/amd/amdgpu/amdgpu_ttm.c
+++ b/amd/amdgpu/amdgpu_ttm.c
@@ -930,7 +930,11 @@ int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages)
 	if (!(gtt->userflags & AMDGPU_GEM_USERPTR_READONLY))
 		flags |= FOLL_WRITE;
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+        mmap_read_lock(mm);
+#else
 	down_read(&mm->mmap_sem);
+#endif
 
 	if (gtt->userflags & AMDGPU_GEM_USERPTR_ANONONLY) {
 		/*
@@ -942,7 +946,11 @@ int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages)
 
 		vma = find_vma(mm, gtt->userptr);
 		if (!vma || vma->vm_file || vma->vm_end < end) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+                        mmap_read_unlock(mm);
+#else
 			up_read(&mm->mmap_sem);
+#endif
 			return -EPERM;
 		}
 	}
@@ -973,12 +981,20 @@ int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages)
 
 	} while (pinned < ttm->num_pages);
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+        mmap_read_unlock(mm);
+#else
 	up_read(&mm->mmap_sem);
+#endif
 	return 0;
 
 release_pages:
 	release_pages(pages, pinned);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+        mmap_read_unlock(mm);
+#else
 	up_read(&mm->mmap_sem);
+#endif
 	return r;
 }
 
diff --git a/ttm/ttm_bo_vm.c b/ttm/ttm_bo_vm.c
index 739ade2..6f0fcd2 100644
--- a/ttm/ttm_bo_vm.c
+++ b/ttm/ttm_bo_vm.c
@@ -73,7 +73,11 @@ static vm_fault_t ttm_bo_vm_fault_idle(struct ttm_buffer_object *bo,
 			goto out_unlock;
 
 		ttm_bo_get(bo);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+                mmap_read_unlock(mm);
+#else
 		up_read(&vma->vm_mm->mmap_sem);
+#endif
 		(void)dma_fence_wait(bo->moving, true);
 		dma_resv_unlock(amdkcl_ttm_resvp(bo));
 		ttm_bo_put(bo);
@@ -149,7 +153,11 @@ vm_fault_t ttm_bo_vm_reserve(struct ttm_buffer_object *bo, struct vm_fault *vmf)
 		if (vmf->flags & FAULT_FLAG_ALLOW_RETRY) {
 			if (!(vmf->flags & FAULT_FLAG_RETRY_NOWAIT)) {
 				ttm_bo_get(bo);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+                                mmap_read_unlock(mm);
+#else
 				up_read(&vma->vm_mm->mmap_sem);
+#endif
 				if (!dma_resv_lock_interruptible(
 					    amdkcl_ttm_resvp(bo), NULL))
 					dma_resv_unlock(amdkcl_ttm_resvp(bo));
-- 
2.28.0


From 15b66a619ad05e61d6deb5f4bb1d0930576043cc Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Wed, 26 Aug 2020 18:41:54 +0200
Subject: [PATCH 09/18] Renamed flag in 5.8+

---
 amd/amdgpu/amdgpu_kms.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/amd/amdgpu/amdgpu_kms.c b/amd/amdgpu/amdgpu_kms.c
index 30df508..ef60f70 100644
--- a/amd/amdgpu/amdgpu_kms.c
+++ b/amd/amdgpu/amdgpu_kms.c
@@ -207,7 +207,11 @@ int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags)
 		/* only need to skip on ATPX */
 		if (amdgpu_device_supports_boco(dev) &&
 		    !amdgpu_is_atpx_hybrid())
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+			dev_pm_set_driver_flags(dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
+#else
 			dev_pm_set_driver_flags(dev->dev, DPM_FLAG_NEVER_SKIP);
+#endif
 		pm_runtime_use_autosuspend(dev->dev);
 		pm_runtime_set_autosuspend_delay(dev->dev, 5000);
 		pm_runtime_allow(dev->dev);
-- 
2.28.0


From d6035d5e2d774f16e8336d2caa05a77659eb15e4 Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Wed, 26 Aug 2020 18:47:33 +0200
Subject: [PATCH 10/18] typo: mm should be the vm_mm member

---
 ttm/ttm_bo_vm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ttm/ttm_bo_vm.c b/ttm/ttm_bo_vm.c
index 6f0fcd2..ff1aeb0 100644
--- a/ttm/ttm_bo_vm.c
+++ b/ttm/ttm_bo_vm.c
@@ -74,7 +74,7 @@ static vm_fault_t ttm_bo_vm_fault_idle(struct ttm_buffer_object *bo,
 
 		ttm_bo_get(bo);
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
-                mmap_read_unlock(mm);
+                mmap_read_unlock(vma->vm_mm);
 #else
 		up_read(&vma->vm_mm->mmap_sem);
 #endif
@@ -154,7 +154,7 @@ vm_fault_t ttm_bo_vm_reserve(struct ttm_buffer_object *bo, struct vm_fault *vmf)
 			if (!(vmf->flags & FAULT_FLAG_RETRY_NOWAIT)) {
 				ttm_bo_get(bo);
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
-                                mmap_read_unlock(mm);
+                                mmap_read_unlock(vma->vm_mm);
 #else
 				up_read(&vma->vm_mm->mmap_sem);
 #endif
-- 
2.28.0


From 40f244f76eff58e74ce8ba889cefc82578823c1c Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Wed, 26 Aug 2020 18:51:49 +0200
Subject: [PATCH 11/18] Add support for new mmap API in 5.8+

---
 amd/amdkfd/kfd_chardev.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/amd/amdkfd/kfd_chardev.c b/amd/amdkfd/kfd_chardev.c
index 153470f..1dc354a 100644
--- a/amd/amdkfd/kfd_chardev.c
+++ b/amd/amdkfd/kfd_chardev.c
@@ -1867,11 +1867,19 @@ static int kfd_create_sg_table_from_userptr_bo(struct kfd_bo *bo,
 	if (cma_write)
 		flags = FOLL_WRITE;
 	locked = 1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+        mmap_read_lock(mm);
+#else
 	down_read(&mm->mmap_sem);
+#endif
 	n = kcl_get_user_pages(task, mm, pa, nents, flags, 0, process_pages,
 				  NULL, &locked);
 	if (locked)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+                mmap_read_unlock(mm);
+#else
 		up_read(&mm->mmap_sem);
+#endif
 	if (n <= 0) {
 		pr_err("CMA: Invalid virtual address 0x%lx\n", pa);
 		ret = -EFAULT;
@@ -2204,12 +2212,20 @@ static int kfd_copy_userptr_bos(struct cma_iter *si, struct cma_iter *di,
 	while (nents && to_copy) {
 		nl = min_t(unsigned int, MAX_PP_KMALLOC_COUNT, nents);
 		locked = 1;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+                mmap_read_lock(ri->mm);
+#else
 		down_read(&ri->mm->mmap_sem);
+#endif
 		nl = kcl_get_user_pages(ri->task, ri->mm, rva, nl,
 					   flags, 0, process_pages, NULL,
 					   &locked);
 		if (locked)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+                        mmap_read_lock(ri->mm);
+#else
 			up_read(&ri->mm->mmap_sem);
+#endif
 		if (nl <= 0) {
 			pr_err("CMA: Invalid virtual address 0x%lx\n", rva);
 			ret = -EFAULT;
-- 
2.28.0


From 826a06909f4b15f826cffb225f2f5ba6933ae227 Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Wed, 26 Aug 2020 18:55:08 +0200
Subject: [PATCH 12/18] Renamed i2c new device function in 5.8+

---
 amd/amdgpu/amdgpu_dpm.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/amd/amdgpu/amdgpu_dpm.c b/amd/amdgpu/amdgpu_dpm.c
index d008ca9..1cc4f2e 100644
--- a/amd/amdgpu/amdgpu_dpm.c
+++ b/amd/amdgpu/amdgpu_dpm.c
@@ -856,7 +856,11 @@ void amdgpu_add_thermal_controller(struct amdgpu_device *adev)
 				const char *name = pp_lib_thermal_controller_names[controller->ucType];
 				info.addr = controller->ucI2cAddress >> 1;
 				strlcpy(info.type, name, sizeof(info.type));
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+				i2c_new_client_device(&adev->pm.i2c_bus->adapter, &info);
+#else
 				i2c_new_device(&adev->pm.i2c_bus->adapter, &info);
+#endif
 			}
 		} else {
 			DRM_INFO("Unknown thermal controller type %d at 0x%02x %s fan control\n",
-- 
2.28.0


From fdd0f73eccc2bd0524b55d741fc67e255f5092c0 Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Thu, 27 Aug 2020 17:13:35 +0200
Subject: [PATCH 13/18] Renamed (un)use_mm for 5.8+

---
 amd/amdgpu/amdgpu_amdkfd.h            | 19 +++++++++++++++++++
 amd/amdkfd/kfd_device_queue_manager.c |  8 ++++++++
 amd/amdkfd/kfd_process.c              |  8 ++++++++
 3 files changed, 35 insertions(+)

diff --git a/amd/amdgpu/amdgpu_amdkfd.h b/amd/amdgpu/amdgpu_amdkfd.h
index f54115f..f182ba5 100644
--- a/amd/amdgpu/amdgpu_amdkfd.h
+++ b/amd/amdgpu/amdgpu_amdkfd.h
@@ -195,6 +195,24 @@ uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *s
  * the first place. This resolves a circular lock dependency involving
  * four locks, including the DQM lock and mmap_sem.
  */
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+#define read_user_wptr(mmptr, wptr, dst)				\
+	({								\
+		bool valid = false;					\
+		if ((mmptr) && (wptr)) {				\
+			pagefault_disable();				\
+			if ((mmptr) == current->mm) {			\
+				valid = !get_user((dst), (wptr));	\
+			} else if (current->mm == NULL) {		\
+				kthread_use_mm(mmptr);				\
+				valid = !get_user((dst), (wptr));	\
+				kthread_unuse_mm(mmptr);			\
+			}						\
+			pagefault_enable();				\
+		}							\
+		valid;							\
+	})
+#else
 #define read_user_wptr(mmptr, wptr, dst)				\
 	({								\
 		bool valid = false;					\
@@ -211,6 +229,7 @@ uint8_t amdgpu_amdkfd_get_xgmi_hops_count(struct kgd_dev *dst, struct kgd_dev *s
 		}							\
 		valid;							\
 	})
+#endif
 
 /* GPUVM API */
 int amdgpu_amdkfd_gpuvm_create_process_vm(struct kgd_dev *kgd, unsigned int pasid,
diff --git a/amd/amdkfd/kfd_device_queue_manager.c b/amd/amdkfd/kfd_device_queue_manager.c
index 6abfeb4..a30a496 100644
--- a/amd/amdkfd/kfd_device_queue_manager.c
+++ b/amd/amdkfd/kfd_device_queue_manager.c
@@ -2319,7 +2319,11 @@ void copy_context_work_handler (struct work_struct *work)
 
 	p = workarea->p;
 	mm = get_task_mm(p->lead_thread);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	kthread_use_mm(mm);
+#else
 	use_mm(mm);
+#endif
 	list_for_each_entry(pdd, &p->per_device_data, per_device_list) {
 		struct device_queue_manager *dqm = pdd->dev->dqm;
 		struct qcm_process_device *qpd = &pdd->qpd;
@@ -2345,7 +2349,11 @@ void copy_context_work_handler (struct work_struct *work)
 
 		dqm_unlock(dqm);
 	}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	kthread_use_mm(mm);
+#else
 	unuse_mm(mm);
+#endif
 	mmput(mm);
 }
 
diff --git a/amd/amdkfd/kfd_process.c b/amd/amdkfd/kfd_process.c
index 461e8ef..e757031 100644
--- a/amd/amdkfd/kfd_process.c
+++ b/amd/amdkfd/kfd_process.c
@@ -199,7 +199,11 @@ static void kfd_sdma_activity_worker(struct work_struct *work)
 	if (!mm)
 		goto cleanup;
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	kthread_use_mm(mm);
+#else
 	use_mm(mm);
+#endif
 
 	list_for_each_entry(sdma_q, &sdma_q_list.list, list) {
 		val = 0;
@@ -213,7 +217,11 @@ static void kfd_sdma_activity_worker(struct work_struct *work)
 		}
 	}
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
 	unuse_mm(mm);
+#else
+	unuse_mm(mm);
+#endif
 	mmput(mm);
 
 	/*
-- 
2.28.0


From c068039b0b6d5b801018088c2960832319cab417 Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Thu, 27 Aug 2020 17:20:44 +0200
Subject: [PATCH 14/18] Add support for new mmap API in 5.8+

---
 amd/amdgpu/amdgpu_amdkfd_gpuvm.c |  8 ++++++++
 amd/amdkfd/kfd_events.c          |  8 ++++++++
 amd/amdkfd/kfd_process.c         | 16 ++++++++++++++++
 3 files changed, 32 insertions(+)

diff --git a/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index 2e31070..5c482a2 100644
--- a/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1436,9 +1436,17 @@ int amdgpu_amdkfd_gpuvm_map_memory_to_gpu(struct kgd_dev *kgd,
 	 * concurrently and the queues are actually stopped
 	 */
 	if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm)) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+        	mmap_write_lock(current->mm);
+#else
 		down_write(&current->mm->mmap_sem);
+#endif
 		is_invalid_userptr = atomic_read(&mem->invalid);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	        mmap_write_unlock(current->mm);
+#else
 		up_write(&current->mm->mmap_sem);
+#endif
 	}
 
 	mutex_lock(&mem->lock);
diff --git a/amd/amdkfd/kfd_events.c b/amd/amdkfd/kfd_events.c
index 20eb5d1..c5804be 100644
--- a/amd/amdkfd/kfd_events.c
+++ b/amd/amdkfd/kfd_events.c
@@ -913,7 +913,11 @@ void kfd_signal_iommu_event(struct kfd_dev *dev, unsigned int pasid,
 
 	memset(&memory_exception_data, 0, sizeof(memory_exception_data));
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	mmap_read_lock(mm);
+#else
 	down_read(&mm->mmap_sem);
+#endif
 	vma = find_vma(mm, address);
 
 	memory_exception_data.gpu_id = dev->id;
@@ -936,7 +940,11 @@ void kfd_signal_iommu_event(struct kfd_dev *dev, unsigned int pasid,
 			memory_exception_data.failure.NoExecute = 0;
 	}
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	mmap_read_unlock(mm);
+#else
 	up_read(&mm->mmap_sem);
+#endif
 	mmput(mm);
 
 	pr_debug("notpresent %d, noexecute %d, readonly %d\n",
diff --git a/amd/amdkfd/kfd_process.c b/amd/amdkfd/kfd_process.c
index e757031..e13aeeb 100644
--- a/amd/amdkfd/kfd_process.c
+++ b/amd/amdkfd/kfd_process.c
@@ -1618,12 +1618,20 @@ static void kfd_process_unmap_doorbells(struct kfd_process *p)
 	struct kfd_process_device *pdd;
 	struct mm_struct *mm = p->mm;
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	mmap_write_lock(mm);
+#else
 	down_write(&mm->mmap_sem);
+#endif
 
 	list_for_each_entry(pdd, &p->per_device_data, per_device_list)
 		kfd_doorbell_unmap(pdd);
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	mmap_write_unlock(mm);
+#else
 	up_write(&mm->mmap_sem);
+#endif
 }
 
 int kfd_process_remap_doorbells_locked(struct kfd_process *p)
@@ -1642,9 +1650,17 @@ static int kfd_process_remap_doorbells(struct kfd_process *p)
 	struct mm_struct *mm = p->mm;
 	int ret = 0;
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	mmap_write_lock(mm);
+#else
 	down_write(&mm->mmap_sem);
+#endif
 	ret = kfd_process_remap_doorbells_locked(p);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	mmap_write_unlock(mm);
+#else
 	up_write(&mm->mmap_sem);
+#endif
 
 	return ret;
 }
-- 
2.28.0


From bd3726d7c089de4962758ead096a29897540a3b1 Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Thu, 27 Aug 2020 17:25:35 +0200
Subject: [PATCH 15/18] Renamed (un)use_mm for 5.8+

---
 amd/amdkfd/kfd_process.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/amd/amdkfd/kfd_process.c b/amd/amdkfd/kfd_process.c
index e13aeeb..24757b2 100644
--- a/amd/amdkfd/kfd_process.c
+++ b/amd/amdkfd/kfd_process.c
@@ -218,7 +218,7 @@ static void kfd_sdma_activity_worker(struct work_struct *work)
 	}
 
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
-	unuse_mm(mm);
+	kthread_unuse_mm(mm);
 #else
 	unuse_mm(mm);
 #endif
-- 
2.28.0


From e1004bb076fbb6c585298067f230cb317ac164f2 Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Thu, 27 Aug 2020 17:27:52 +0200
Subject: [PATCH 16/18] Add support for new mmap API in 5.8+

---
 amd/amdgpu/amdgpu_mn.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/amd/amdgpu/amdgpu_mn.c b/amd/amdgpu/amdgpu_mn.c
index 75ef850..589b8f5 100644
--- a/amd/amdgpu/amdgpu_mn.c
+++ b/amd/amdgpu/amdgpu_mn.c
@@ -551,7 +551,11 @@ struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev,
 
 	mutex_lock(&adev->mn_lock);
 #ifndef HAVE_DOWN_WRITE_KILLABLE
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	mmap_write_lock(mm);
+#else
 	down_write(&mm->mmap_sem);
+#endif
 #else
 	if (down_write_killable(&mm->mmap_sem)) {
 		mutex_unlock(&adev->mn_lock);
@@ -589,13 +593,21 @@ struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev,
 	hash_add(adev->mn_hash, &amn->node, AMDGPU_MN_KEY(mm, type));
 
 release_locks:
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	mmap_write_unlock(mm);
+#else
 	up_write(&mm->mmap_sem);
+#endif
 	mutex_unlock(&adev->mn_lock);
 
 	return amn;
 
 free_amn:
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	mmap_write_unlock(mm);
+#else
 	up_write(&mm->mmap_sem);
+#endif
 	mutex_unlock(&adev->mn_lock);
 	kfree(amn);
 
-- 
2.28.0


From 025f4f1f3025cef575dad1fba9f69b7e575a73ca Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Thu, 27 Aug 2020 17:33:46 +0200
Subject: [PATCH 17/18] Add support for new mmap API in 5.8+

---
 amd/amdgpu/amdgpu_mn.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/amd/amdgpu/amdgpu_mn.c b/amd/amdgpu/amdgpu_mn.c
index 589b8f5..4c2f61b 100644
--- a/amd/amdgpu/amdgpu_mn.c
+++ b/amd/amdgpu/amdgpu_mn.c
@@ -556,8 +556,12 @@ struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev,
 #else
 	down_write(&mm->mmap_sem);
 #endif
+#else
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)
+	if (mmap_write_lock_killable(mm)) {
 #else
 	if (down_write_killable(&mm->mmap_sem)) {
+#endif
 		mutex_unlock(&adev->mn_lock);
 		return ERR_PTR(-EINTR);
 	}
-- 
2.28.0


From 9afcbaf24d9385ff9ac1328cbf82007d0f4e5d41 Mon Sep 17 00:00:00 2001
From: Andreas Gravgaard Andersen <andreasga22@gmail.com>
Date: Thu, 27 Aug 2020 17:43:45 +0200
Subject: [PATCH 18/18] destroy_connector does not exist in 5.8+

---
 amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index c7def42..da2577f 100644
--- a/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -551,7 +551,9 @@ static void dm_dp_mst_register_connector(struct drm_connector *connector)
 
 static const struct drm_dp_mst_topology_cbs dm_mst_cbs = {
 	.add_connector = dm_dp_add_mst_connector,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0)
 	.destroy_connector = dm_dp_destroy_mst_connector,
+#endif
 #if defined(HAVE_DRM_DP_MST_TOPOLOGY_CBS_HOTPLUG)
 	.hotplug = dm_dp_mst_hotplug,
 #endif
-- 
2.28.0

diff --git a/amd/amdkcl/kcl_common.h b/amd/amdkcl/kcl_common.h
index 8992a0c..c385be3 100644
--- a/amd/amdkcl/kcl_common.h
+++ b/amd/amdkcl/kcl_common.h
@@ -28,7 +28,7 @@ static inline void *amdkcl_fp_setup(const char *symbol, void *fp_stup)
 	unsigned long addr;
 	void *fp = NULL;
 
-	addr = kallsyms_lookup_name(symbol);
+	addr = kcl_kallsyms_lookup_name(symbol);
 	if (addr == 0) {
 		fp = fp_stup;
 		if (fp != NULL)

Last edited by loqs (2020-09-11 01:25:36)

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#22 2020-09-11 07:31:29

apaz
Member
Registered: 2018-07-23
Posts: 52

Re: AMD dkms fails

I think rocm is not compatible with Navi 10 (GFX10):

https://github.com/RadeonOpenCompute/RO … orted-gpus

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#23 2020-09-11 20:58:18

loqs
Member
Registered: 2014-03-06
Posts: 12,560

Re: AMD dkms fails

@apaz did the DKMS modules provided by rocm-dkms-bin  build for you without modification?

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#24 2020-09-11 21:51:54

Camandros
Member
Registered: 2020-09-10
Posts: 20

Re: AMD dkms fails

@loqs rock-dkms-bin 3.7-1

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#25 2020-09-11 22:14:45

loqs
Member
Registered: 2014-03-06
Posts: 12,560

Re: AMD dkms fails

Camandros wrote:

@loqs rock-dkms-bin 3.7-1

That would explain the different error.  The latest release is 3.7-20 which should fail with the output linked in post #12.

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