You are not logged in.
Same as in https://bbs.archlinux.org/viewtopic.php?id=197106 I have many segfaults in dmesg output like a
chown[2244]: segfault at 8 ip 00007f2e9ef0f567 sp 00007fff00f29580 error 4 in ld-2.21.so[7f2e9ef04000+22000]
I have Haswell cpu and updated microcode
dmesg | grep microcode
[ 0.000000] CPU0 microcode updated early to revision 0x1c, date = 2014-07-03
[ 0.097072] CPU1 microcode updated early to revision 0x1c, date = 2014-07-03
[ 0.118551] CPU2 microcode updated early to revision 0x1c, date = 2014-07-03
[ 0.140013] CPU3 microcode updated early to revision 0x1c, date = 2014-07-03
[ 0.383396] microcode: CPU0 sig=0x306c3, pf=0x20, revision=0x1c
[ 0.383401] microcode: CPU1 sig=0x306c3, pf=0x20, revision=0x1c
[ 0.383408] microcode: CPU2 sig=0x306c3, pf=0x20, revision=0x1c
[ 0.383414] microcode: CPU3 sig=0x306c3, pf=0x20, revision=0x1c
[ 0.383419] microcode: CPU4 sig=0x306c3, pf=0x20, revision=0x1c
[ 0.383424] microcode: CPU5 sig=0x306c3, pf=0x20, revision=0x1c
[ 0.383429] microcode: CPU6 sig=0x306c3, pf=0x20, revision=0x1c
[ 0.383434] microcode: CPU7 sig=0x306c3, pf=0x20, revision=0x1c
[ 0.383466] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
I've tried different versions of Nvidia driver and kernel (regular/mainline/lts). Before upgrading I used linux-mainline 4.0 without any problem.
Any ideas how to fix it?
Last edited by anisart (2015-05-16 18:44:54)
Offline
Users who helped microcode update, can you post output of command below?
cpuid | egrep '(HLE|RTM)'
I have such output
HLE hardware lock elision = false
RTM: restricted transactional memory = false
HLE hardware lock elision = false
RTM: restricted transactional memory = false
HLE hardware lock elision = false
RTM: restricted transactional memory = false
HLE hardware lock elision = false
RTM: restricted transactional memory = false
HLE hardware lock elision = false
RTM: restricted transactional memory = false
HLE hardware lock elision = false
RTM: restricted transactional memory = false
HLE hardware lock elision = false
RTM: restricted transactional memory = false
HLE hardware lock elision = false
RTM: restricted transactional memory = false
It seems like new microcode does not enable TSX instructions on my Intel(R) Core(TM) i7-4710HQ CPU
Offline
It seems like new microcode does not enable TSX instructions on my Intel(R) Core(TM) i7-4710HQ CPU
That's good, since the point of the update was to disable the TSX instructions.
Last edited by Scimmia (2015-05-15 14:02:25)
Online
But why I keep getting segfaults?
I've tried rebuild glibc with --enable-lock-elision=no and without --enable-lock-elision parameter as in https://bbs.archlinux.org/viewtopic.php?id=172305 but no changes.
Upd. I do not understand why the existing solutions have helped others, and I seemed to struggle with the wall...
Last edited by anisart (2015-05-15 19:26:54)
Offline
I installed another Arch nearby and in it there are not segfaults without updating microcode and other manipulations. I chroot from it to first installation and run thunar -- segfault. It's ok as it should be. I worked in new installation few hours with couple of reboots. After that I tried again run thunar via chroot -- it works! I rebooted to first installation and no errors - all work.
I haven't changed anything in first system since last segfault. WTF???
If who has any thoughts about it please tell me via mail. I will mark topic as solved.
Offline